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DiBcom (http://www.dibcom.com) is a company designing chipsets in the field of digital TV reception. The "DSP" team, in charge of the LLVM/CLANG based compilation chain, as well as the cpu design, is hiring. Beside participating to the toolchain development and deployment, you will also be par...

...om gohman at apple.com Wed Apr 1 12:37:16 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 1 Apr 2009 10:37:16 -0700 Subject: [LLVMdev] adjust address calculus for an architecture that does not address bytes In-Reply-To: <57C38DA176A0A34A9B9F3CCCE33D3C4AFA7EFF5E0B at FRPAR1CL009.coe.adi.dibcom.com> References: <57C38DA176A0A34A9B9F3CCCE33D3C4AFA7EFF5E0A at FRPAR1CL009.coe.adi.dibcom.com> <49D26D79.6080109 at xmos.com> <57C38DA176A0A34A9B9F3CCCE33D3C4AFA7EFF5E0B at FRPAR1CL009.coe.adi.dibcom.com> Message-ID: <A1A0F5A3-1736-4DF0-8468-103A236759FF at apple.com>...

On Tue, Oct 19, 2010 at 12:19 AM, Arnaud Allard de Grandmaison <Arnaud.AllardDeGrandMaison at dibcom.com> wrote: >> But if the usage was in a loop it would be better (at the cost of >> register pressure) to materialise 5 into a register outside of the >> loop and use the register repeatedly in the loop. > > Bouncing on this subject: you can not know before isel is over i...

...g a patch. You may also look forward to big performance improvements in the PBQP allocator: I'm working on updates which will improve compile speeds and massively reduce memory use. Regards, Lang. On Tue, Jun 7, 2011 at 7:02 PM, Arnaud Allard de Grandmaison < Arnaud.AllardDeGrandMaison at dibcom.com> wrote: > > I also considered this approach, but did not want to dive in the constraint > handling for now. > > The PBQP path seemed easier at first sight --- and was easy to setup. And I > always wanted to give a try to the pbqp :) > > I will add the hook to the pbq...

...d not happen so often...). Btw, you didn't reply on the mailing list... is it just an omission ? Getting it on the mailing list might be helpful for the llvm community ;) Best regards, Damien On Fri, Feb 11, 2011 at 1:30 AM, Arnaud Allard de Grandmaison <Arnaud.AllardDeGrandMaison at dibcom.com<mailto:Arnaud.AllardDeGrandMaison at dibcom.com>> wrote: Hi Damien, We also found this issue; our way of solving it was to add a pass after postRAScheduler to handle those inter MBB hazards. The postRAHazardRecognizer maintains a hazard state inside the basic block, and depending on t...

I also considered this approach, but did not want to dive in the constraint handling for now. The PBQP path seemed easier at first sight --- and was easy to setup. And I always wanted to give a try to the pbqp :) I will add the hook to the pbqp and propose a patch if this looks clean enough. Thanks, -- Arnaud de Grandmaison -----Original Message----- From: Jakob Stoklund Olesen

On Sun, Mar 13, 2011 at 5:01 PM, Arnaud Allard de Grandmaison <Arnaud.AllardDeGrandMaison at dibcom.com> wrote: > Hi all, > > The IndVarSimplify pass seems to be too aggressive when it enlarge the induction variable type ; this can pessimize the generated code when the new induction variable size is not natively supported by the target. This is probably not an issue for x86_64, which...

I am working on a target which has some structural hazards. To detect these hazards, I implemented a sub-class of PostRAHazardRecognizer. PostRAHazardRecognizer resets the hazard state on a basic block basis. So, how to detect hazards that may occur between the end of a basic block and the beginning of another basic block ? Thanks ! -------------- next part -------------- An HTML

...: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Sunday, March 13, 2011 11:08 PM To: Arnaud Allard de Grandmaison Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] IndVarSimplify too aggressive ? On Sun, Mar 13, 2011 at 5:01 PM, Arnaud Allard de Grandmaison <Arnaud.AllardDeGrandMaison at dibcom.com> wrote: > Hi all, > > The IndVarSimplify pass seems to be too aggressive when it enlarge the induction variable type ; this can pessimize the generated code when the new induction variable size is not natively supported by the target. This is probably not an issue for x86_64, which...

Thanks Eli. I will try your solution, but then, what is the difference between [IntrReadArgMem] and [IntrReadMem] when specifying an intrinsic ? It seems that both options specify that a function is 'readonly' (maybe the difference is not well supported for then moment ?) Julien > Dead store elimination is that pass that could do the optimizations in > question. The second

Hi, Here is a little patch to have cmake detect dotty, and if this was the case, update the HAVE_DOTTY and LLVM_PATH_DOTTY defines in include/llvm/Config/config.h. This should apply cleanly on TOT. Best regards, -- Arnaud de Grandmaison -------------- next part -------------- An HTML attachment was scrubbed... URL:

> But if the usage was in a loop it would be better (at the cost of > register pressure) to materialise 5 into a register outside of the > loop and use the register repeatedly in the loop. Bouncing on this subject: you can not know before isel is over if the constants have to materialize into registers or not, as this is really dependent on the target's instruction set. Do we have

Rob, I can reproduce the behaviour you observe using llvm top-of-tree. I will try to look into it. Best regards, -- Arnaud de Grandmaison -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Rob Pieke Sent: Monday, November 15, 2010 4:27 PM To: Duncan Sands; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Optimization of calls to

...ng a patch. You may also look forward to big performance improvements in the PBQP allocator: I'm working on updates which will improve compile speeds and massively reduce memory use. Regards, Lang. On Tue, Jun 7, 2011 at 7:02 PM, Arnaud Allard de Grandmaison <Arnaud.AllardDeGrandMaison at dibcom.com<mailto:Arnaud.AllardDeGrandMaison at dibcom.com>> wrote: I also considered this approach, but did not want to dive in the constraint handling for now. The PBQP path seemed easier at first sight --- and was easy to setup. And I always wanted to give a try to the pbqp :) I will add th...

Hi Dan, >Did the code in the tutorial work at some point? Offhand, I wouldn't expect >any of my recent changes to have affected this. I'm reluctant to fix this >without understanding how the original code was intended to work. The code works, but not as shown in the tutorial. In the tutorial, it shows that multiple calls to pure functions (sin, cos) can be optimized. Without the

> let me say that in general doing this is pointless. Due to SSA form, > if %x is > set to 5 you can't set it to something else later. Thus everywhere > that you > use %x you might as well just directly use 5 there instead. But the cost of doing that might be greater than the costs of keeping it in a register. Suppose the code was ORing a value with 5 and the target only had

On Thu, Dec 4, 2008 at 7:38 AM, Julien Schmitt <jschmitt at dibcom.fr> wrote: > Dear LLVMer ; > > i'm trying to use LLVM for a specific target, using different memory banks. > I have written the frontend to generate a valid IR and want to use the > existing passes (as defined in tool opt) to optimize the code. > > The target has specifi...

Hi, > $ ../llvm-2.5/configure --prefix=/pkg/bin/llvm/ > CC=/pkg/bin/gcc-4.2.4/bin/gcc CXX=/pkg/bin/gcc-4.2.4/bin/g++ > CXXCPP=/pkg/bin/gcc-4.2.4/bin/cpp LDFLAGS=-L/pkg/bin/gcc-4.2.4/lib64/ > CXXFLAGS=-I/pkg/bin/gcc-4.2.4/include/c++/4.2.4/ > CPPFLAGS=-I/pkg/bin/gcc-4.2.4/include/ how about: export PATH=/pkg/bin/:$PATH ../llvm-2.5/configure --prefix=/pkg/bin/llvm/ instead? Ciao,

Hi, 1. This instruction is not selected automatically by the instruction selector. The instruction combine / select stages insert registercopies, and they are expanded later on by the copyRegToReg() function provided by the MSP430InstrInfo to this MOV16rr. 2. ReMaterializable means there is no need to find a way to preserve the value in a register : the instruction can be just be reissued

...ite a tablegen backend that can output a opcode->opcode map, which can be used by the pass. Is this and intended use case for Tablegen? Or, are tablegen backends supposed to be generic to all architecture backends? Manjunath On Mon, Jun 8, 2009 at 1:23 AM, Christian Sayer<Christian.Sayer at dibcom.fr> wrote: > Manjunath, > I asked this question recently, but instead of telling you to search the archive > I'm going to take it as a chance to recall how to do it (because I'll do so anyway > and even telling tablegen to use an enum for instructions is not as trivial to do...