2011/5/24 Justin Holewinski <justin.holewinski at gmail.com>:> On Tue, May 24, 2011 at 3:02 AM, roy rosen <roy.1rosen at gmail.com> wrote: >> >> Hi, >> >> I was wondering if LLVM supports predicates and conditional execution. >> Something like we have in IA64. >> There is a register class of predicates and then every instruction may >> be predicated by a register from this class. >> For example: >> >> cmp_less p, x, y // p is a predicate which gets the result of x < y >> p add x, x, 2 // if p then do the add instruction >> >> Is there support in LLVM to something like that? >> >> Which architecture can show a good example for the implementation of that? > > You may want to look at the PTX back-end. The PTX assembly language > supports exactly what you are describing, and we currently use it to > implement conditional branching. There is a register class for predicates > (i1 in LLVM) and all machine instructions have a predicate operand and > predicate filter (PTX supports inverted predicates). For un-predicated > instructions, the predicate operand is just set to the special NoRegister > constant. > >> >> Thanks, Roy. >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > > > -- > > Thanks, > Justin Holewinski >I see that PTX has predicated execution for all instructions. in LLVM you implement conditional execution only for branches? Do you know what it takes to make it work for all instructions? Thanks, Roy.
On Tue, May 24, 2011 at 8:35 AM, roy rosen <roy.1rosen at gmail.com> wrote:> 2011/5/24 Justin Holewinski <justin.holewinski at gmail.com>: > > On Tue, May 24, 2011 at 3:02 AM, roy rosen <roy.1rosen at gmail.com> wrote: > >> > >> Hi, > >> > >> I was wondering if LLVM supports predicates and conditional execution. > >> Something like we have in IA64. > >> There is a register class of predicates and then every instruction may > >> be predicated by a register from this class. > >> For example: > >> > >> cmp_less p, x, y // p is a predicate which gets the result of x < y > >> p add x, x, 2 // if p then do the add instruction > >> > >> Is there support in LLVM to something like that? > >> > >> Which architecture can show a good example for the implementation of > that? > > > > You may want to look at the PTX back-end. The PTX assembly language > > supports exactly what you are describing, and we currently use it to > > implement conditional branching. There is a register class for > predicates > > (i1 in LLVM) and all machine instructions have a predicate operand and > > predicate filter (PTX supports inverted predicates). For un-predicated > > instructions, the predicate operand is just set to the special NoRegister > > constant. > > > >> > >> Thanks, Roy. > >> _______________________________________________ > >> LLVM Developers mailing list > >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > > > > > > > -- > > > > Thanks, > > Justin Holewinski > > > > I see that PTX has predicated execution for all instructions. > in LLVM you implement conditional execution only for branches? > Do you know what it takes to make it work for all instructions? >It already works for all instructions, as long as you supply a predicate operand in the machine instruction (not to be confused with an LLVM IR instruction). Currently, this feature is only being used to implement conditional branches, but that is just because we have not implemented it for other cases. The primary difficulty here is deciding when and how to use predicates. LLVM IR does not support predicated execution, so we need to match specific LLVM IR patterns into predicated instructions when compiling for PTX. It is somewhat trivial in cases such as conditional branches, where predicates are the only way to implement them in PTX, and some LLVM IR constructs such as the select instruction. For more interesting cases, such as converting simple if-then-else statements into predicated instruction blocks, we still have yet to decide how best to handle this. Can you provide a little more information on what you want to do in LLVM? Are you wanting to generate an Itanium back-end, or are you just using that as an example?> Thanks, Roy. >-- Thanks, Justin Holewinski -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110524/e683f1ce/attachment.html>
2011/5/24 Justin Holewinski <justin.holewinski at gmail.com>:> On Tue, May 24, 2011 at 8:35 AM, roy rosen <roy.1rosen at gmail.com> wrote: >> >> 2011/5/24 Justin Holewinski <justin.holewinski at gmail.com>: >> > On Tue, May 24, 2011 at 3:02 AM, roy rosen <roy.1rosen at gmail.com> wrote: >> >> >> >> Hi, >> >> >> >> I was wondering if LLVM supports predicates and conditional execution. >> >> Something like we have in IA64. >> >> There is a register class of predicates and then every instruction may >> >> be predicated by a register from this class. >> >> For example: >> >> >> >> cmp_less p, x, y // p is a predicate which gets the result of x < y >> >> p add x, x, 2 // if p then do the add instruction >> >> >> >> Is there support in LLVM to something like that? >> >> >> >> Which architecture can show a good example for the implementation of >> >> that? >> > >> > You may want to look at the PTX back-end. The PTX assembly language >> > supports exactly what you are describing, and we currently use it to >> > implement conditional branching. There is a register class for >> > predicates >> > (i1 in LLVM) and all machine instructions have a predicate operand and >> > predicate filter (PTX supports inverted predicates). For un-predicated >> > instructions, the predicate operand is just set to the special >> > NoRegister >> > constant. >> > >> >> >> >> Thanks, Roy. >> >> _______________________________________________ >> >> LLVM Developers mailing list >> >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >> > >> > >> > >> > -- >> > >> > Thanks, >> > Justin Holewinski >> > >> >> I see that PTX has predicated execution for all instructions. >> in LLVM you implement conditional execution only for branches? >> Do you know what it takes to make it work for all instructions? > > It already works for all instructions, as long as you supply a predicate > operand in the machine instruction (not to be confused with an LLVM IR > instruction). Currently, this feature is only being used to implement > conditional branches, but that is just because we have not implemented it > for other cases. > The primary difficulty here is deciding when and how to use predicates. > LLVM IR does not support predicated execution, so we need to match specific > LLVM IR patterns into predicated instructions when compiling for PTX. It is > somewhat trivial in cases such as conditional branches, where predicates are > the only way to implement them in PTX, and some LLVM IR constructs such as > the select instruction. For more interesting cases, such as converting > simple if-then-else statements into predicated instruction blocks, we still > have yet to decide how best to handle this. > Can you provide a little more information on what you want to do in LLVM? > Are you wanting to generate an Itanium back-end, or are you just using that > as an example? >> >> Thanks, Roy. > > > > -- > > Thanks, > Justin Holewinski >I am not writing an Itanium backend. I am writing for a different architecture and am trying to understand LLVM's capabilities in regards to the special features of my architecture. Thanks for the answers, Roy.
Maybe Matching Threads
- [LLVMdev] predicates and conditional execution
- [LLVMdev] predicates and conditional execution
- [LLVMdev] predicates and conditional execution
- [LLVMdev] predicates and conditional execution
- [LLVMdev] Upstream PTX backend that uses target independent code generator if possible