search for: cmp_less

Hi, I was wondering if LLVM supports predicates and conditional execution. Something like we have in IA64. There is a register class of predicates and then every instruction may be predicated by a register from this class. For example: cmp_less p, x, y // p is a predicate which gets the result of x < y p add x, x, 2 // if p then do the add instruction Is there support in LLVM to something like that? Which architecture can show a good example for the implementation of that? Thanks, Roy.

...oy rosen wrote: > Hi, > > I was wondering if LLVM supports predicates and conditional execution. > Something like we have in IA64. > There is a register class of predicates and then every instruction may > be predicated by a register from this class. > For example: > > cmp_less p, x, y // p is a predicate which gets the result of x < y > p add x, x, 2 // if p then do the add instruction > > Is there support in LLVM to something like that? > Which architecture can show a good example for the implementation of that? Hi Roy, LLVM has support for predicatio...

...> >> I was wondering if LLVM supports predicates and conditional execution. >> Something like we have in IA64. >> There is a register class of predicates and then every instruction may >> be predicated by a register from this class. >> For example: >> >> cmp_less p, x, y // p is a predicate which gets the result of x < y >> p add x, x, 2 // if p then do the add instruction >> >> Is there support in LLVM to something like that? >> >> Which architecture can show a good example for the implementation of that? > > You may...

...il.com> wrote: > Hi, > > I was wondering if LLVM supports predicates and conditional execution. > Something like we have in IA64. > There is a register class of predicates and then every instruction may > be predicated by a register from this class. > For example: > > cmp_less p, x, y // p is a predicate which gets the result of x < y > p add x, x, 2 // if p then do the add instruction > > Is there support in LLVM to something like that? Which architecture can show a good example for the implementation of that? > You may want to look at the PTX back-end....

...if LLVM supports predicates and conditional execution. > >> Something like we have in IA64. > >> There is a register class of predicates and then every instruction may > >> be predicated by a register from this class. > >> For example: > >> > >> cmp_less p, x, y // p is a predicate which gets the result of x < y > >> p add x, x, 2 // if p then do the add instruction > >> > >> Is there support in LLVM to something like that? > >> > >> Which architecture can show a good example for the implementation of...