I've got the following problem in the X86 selector generated by
TableGen:
llvm/lib/Target/X86/X86GenDAGISel.inc:91821: error: duplicate case value
llvm/lib/Target/X86/X86GenDAGISel.inc:91442: error: previously used here
This seems to happen because of a pattern I added for VEXTRACTF128 which uses
extract_subreg:
[(set DSTREGCLASS:$dst,
(DSTTYPE (extract_subreg
(vector_shuffle
(SRCTYPE undef),
(SRCTYPE SRCREGCLASS:$src1),
VEXTRACTF128_shuffle_mask:$src2),
x86_subreg_128bit)))],
def x86_subreg_128bit : PatLeaf<(i32 1)>;
Curiously, I have analogous patterns for VINSERTF128 that use insert_subreg
but it doesn't generate any duplicate case values.
Anyone seen something like this before? Any ideas on how to fix it?
-Dave
On Thursday 03 December 2009 13:39, David Greene wrote:> I've got the following problem in the X86 selector generated by > TableGen: > > llvm/lib/Target/X86/X86GenDAGISel.inc:91821: error: duplicate case value > llvm/lib/Target/X86/X86GenDAGISel.inc:91442: error: previously used here > > This seems to happen because of a pattern I added for VEXTRACTF128 which > uses extract_subreg: > > [(set DSTREGCLASS:$dst, > (DSTTYPE (extract_subreg > (vector_shuffle > (SRCTYPE undef), > (SRCTYPE SRCREGCLASS:$src1), > VEXTRACTF128_shuffle_mask:$src2), > x86_subreg_128bit)))], > > def x86_subreg_128bit : PatLeaf<(i32 1)>;Whoops, I forgot to fill in types: (outs VR128:$dst), (ins VR129:$src1, i32i8imm:$src2) [(set DSTREGCLASS:$dst, (v4f32 (extract_subreg (vector_shuffle (v8f32 undef), (v8f32 SRCREGCLASS:$src1), VEXTRACTF128_shuffle_mask:$src2), x86_subreg_128bit)))], -Dave
On Thursday 03 December 2009 13:43, David Greene wrote:> Whoops, I forgot to fill in types: > > (outs VR128:$dst), (ins VR129:$src1, i32i8imm:$src2) > > [(set DSTREGCLASS:$dst, > (v4f32 (extract_subreg > (vector_shuffle > (v8f32 undef), > (v8f32 SRCREGCLASS:$src1), > VEXTRACTF128_shuffle_mask:$src2), > x86_subreg_128bit)))],Well, it's conflicting with the hard-coded case statement from DAGISelEmitter.cpp. What's the best way to resolve this? Introduce another DAG operator that means the same thing as ISD::EXTRACT_SUBREG but that can be used as the top-level operator in a pattern? -Dave