llvm dev - Jan 2009 - [LLVMdev] inline asm semantics: output constraint width smaller than input

On Tue, Jan 27, 2009 at 8:56 PM, H. Peter Anvin <hpa at zytor.com>
wrote:
> Kyle Moffett wrote:
>> Actually, PPC64 boxes basically don't care... the usable GPRs are
all
>> either 32-bit (for PPC32) or 64-bit (for PPC64), the <=32-bit
>> instructions are identical across both, they just
>> truncate/sign-extend/etc based on the lower 32-bits of the register.
>> Also, you would only do a right-shift if you were going all the way
>> out to memory as 64-bit and all the way back in as 32-bit... within a
>> single register it's kept coherent.
>
> Think about a 64-bit integer on ppc32.  It will by necessity kept in two
> registers.  On gcc I believe it will always be a consecutive pair of
> registers (AFAIK that's a hard-coded assumption in gcc, with the result
that
> gcc has a nonstandard internal register numbering for x86 since the
commonly
> used dx:ax pair is actually registers 2:0 in the hardware numbering.)
Even in the 64-bit-integer on 32-bit-CPU case, you still end up with
the lower 32-bits in a standard integer GPR, and it's trivial to just
ignore the "upper" register.  You also would not need to do any kind
of bit-shift, so long as your inline assembly initializes both GPRs
and puts the halves of the result where they belong.

Cheers,
Kyle Moffett

Kyle Moffett wrote:
> 
> Even in the 64-bit-integer on 32-bit-CPU case, you still end up with
> the lower 32-bits in a standard integer GPR, and it's trivial to just
> ignore the "upper" register.  You also would not need to do any
kind
> of bit-shift, so long as your inline assembly initializes both GPRs
> and puts the halves of the result where they belong.
> 
In this case, we're talking about what happens when the assembly takes a
64-bit input operand in the same register as a 32-bit output operand
(with a "0" constraint.)  Is the output operand the same register
number
as the high register or the low register?  On an LE machine the answer
is trivial and obvious -- the low register; on a BE machine both
interpretations are possible (I actually suspect gcc will assign the
high register, just based on how gcc internals work in this case.)

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

On Wed, Jan 28, 2009 at 12:29 PM, H. Peter Anvin <hpa at zytor.com>
wrote:
> Kyle Moffett wrote:
>> Even in the 64-bit-integer on 32-bit-CPU case, you still end up with
>> the lower 32-bits in a standard integer GPR, and it's trivial to
just
>> ignore the "upper" register.  You also would not need to do
any kind
>> of bit-shift, so long as your inline assembly initializes both GPRs
>> and puts the halves of the result where they belong.
>
> In this case, we're talking about what happens when the assembly takes
a
> 64-bit input operand in the same register as a 32-bit output operand
> (with a "0" constraint.)  Is the output operand the same register
number
> as the high register or the low register?  On an LE machine the answer
> is trivial and obvious -- the low register; on a BE machine both
> interpretations are possible (I actually suspect gcc will assign the
> high register, just based on how gcc internals work in this case.)
On a BE 32-bit machine, the "output register" technically ought to be
"64-bit" anyways, since it's constrained to be the same as the
64-bit
"input register".  That means that you ought to make sure to set
*both* output registers appropriately, one of them being 0 and the
other being the 32-bit number.  I think that's the only answer that
actually makes any sense from a holistic code-generation sense.  So it
seems we are in violent agreement :-D.

Cheers,
Kyle Moffett