On Tue, 2008-09-23 at 13:33 +0100, Richard Osborne wrote:> sanjiv gupta wrote: > > I have a question: > > In the pattern below from X86 > > > > def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), > > "inc{b}\tdst", > > [(set GR8:$dst, (add GR8:$src, 1))]>; > > > > Since we are emitting only "inc $dst", > > What makes sure that the $src and $dst are same register? > > > > - Sanjiv > It's enclosed inside : > > let isTwoAddress = 1 in { > ... > } > > (you'll need to scroll up a fair amount to find this). >That means, it gets converted to dst = src; dst = dst + 1; Right ? - Sanjiv> Richard > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
sanjiv gupta wrote:> On Tue, 2008-09-23 at 13:33 +0100, Richard Osborne wrote: > >> sanjiv gupta wrote: >> >>> I have a question: >>> In the pattern below from X86 >>> >>> def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src), >>> "inc{b}\tdst", >>> [(set GR8:$dst, (add GR8:$src, 1))]>; >>> >>> Since we are emitting only "inc $dst", >>> What makes sure that the $src and $dst are same register? >>> >>> - Sanjiv >>> >> It's enclosed inside : >> >> let isTwoAddress = 1 in { >> ... >> } >> >> (you'll need to scroll up a fair amount to find this). >> >> > That means, it gets converted to > dst = src; > dst = dst + 1; > > Right ? > > - Sanjiv >Yes, I believe the two address instruction pass performs exactly this transformation. Richard
Sanjiv.Gupta at microchip.com
2008-Sep-23 16:05 UTC
[LLVMdev] A question about instruction operands.
> >>> > >> It's enclosed inside : > >> > >> let isTwoAddress = 1 in { > >> ... > >> } > >> > >> (you'll need to scroll up a fair amount to find this). > >> > >> > > That means, it gets converted to > > dst = src; > > dst = dst + 1; > > > > Right ? > > > > - Sanjiv > > > Yes, I believe the two address instruction pass performs exactly this > transformation. >Thanks. How do I communicate if my CopyRegToReg instruction clobbers a register of another register class? Is it through let Defs = [REG] { ... } while defining the instr pattern? - Sanjiv> _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev