search for: clobbered

Displaying 20 results from an estimated 1882 matches for "clobbered".

2016 Apr 29
2
[MemorySSA] Potential CachingMemorySSAWalker bug
Hi guys, I think I have run into another CachingMemorySSAWalker cache bug. It's a bit tricky to reproduce, so I'd like to start by trying to show you what is happening when running EarlyCSE with my local changes to use MemorySSA. I've attached a debug log that shows that the value returned by getClobberingMemoryAccess(Inst) after a call to removeMemoryAccess is wrong. The
2018 Aug 13
0
[PATCH v2 03/11] x86/paravirt: remove clobbers from struct paravirt_patch_site
There is no need any longer to store the clobbers in struct paravirt_patch_site. Remove clobbers from the struct and from the related macros. While at it fix some lines longer than 80 characters. Signed-off-by: Juergen Gross <jgross at suse.com> --- arch/x86/include/asm/paravirt.h | 33 +++++++++++++++------------------ arch/x86/include/asm/paravirt_types.h | 1 - 2 files changed,
2017 Oct 04
0
[PATCH 06/13] x86/paravirt: Clean up paravirt-asm.h
Some cleanup to make the code easier to read and understand: - Use the common "PV_" prefix - Simplify the PV_SITE macro interface - Improve whitespace Signed-off-by: Josh Poimboeuf <jpoimboe at redhat.com> --- arch/x86/include/asm/paravirt-asm.h | 95 +++++++++++++++++++------------------ 1 file changed, 49 insertions(+), 46 deletions(-) diff --git
2007 Apr 18
3
explicit saves vs clobbers in paravirt.h
In your sequences in asm/paravirt.h, you explicitly save the caller-save regs: static inline void raw_local_irq_restore(unsigned long f) { __asm__ __volatile__(paravirt_alt("pushl %%ecx; pushl %%edx\n\t" "pushl %1; call *%0\n\t" "popl %1; popl %%edx; popl %%ecx", PARAVIRT_RESTORE_FLAGS) : : "m" (paravirt_ops.restore_fl),
2018 Aug 13
0
[PATCH v2 02/11] x86/paravirt: remove clobbers parameter from paravirt patch functions
The clobbers parameter from paravirt_patch_default() et al isn't used any longer. Remove it. Signed-off-by: Juergen Gross <jgross at suse.com> --- arch/x86/include/asm/paravirt_types.h | 7 +++---- arch/x86/kernel/alternative.c | 2 +- arch/x86/kernel/paravirt.c | 14 +++++--------- arch/x86/kernel/paravirt_patch_32.c | 5 ++---
2017 Oct 04
0
[PATCH 05/13] x86/paravirt: Move paravirt asm macros to paravirt-asm.h
The paravirt.h file is quite big and the asm interfaces for paravirt don't need to be in the same file as the C interfaces. Move the asm interfaces to a dedicated header file. Signed-off-by: Josh Poimboeuf <jpoimboe at redhat.com> --- arch/x86/entry/entry_32.S | 1 + arch/x86/entry/entry_64.S | 2 +- arch/x86/entry/entry_64_compat.S | 1 +
2013 Jan 08
2
[LLVMdev] Inline asm bug?
On 1/8/2013 3:52 PM, Eli Friedman wrote: > > From gcc docs: "If your assembler instructions access memory in an > unpredictable fashion, add `memory' to the list of clobbered > registers. This causes GCC to not keep memory values cached in > registers across the assembler instruction and not optimize stores or > loads to that memory. You also should add the volatile keyword if the > memory affected is not listed in the inputs or outputs of the asm, as > t...
2007 Jul 18
2
Hash.from_xml
...#39;'>Content</tag1> #=> { "tag1" => "Content" } - I think it should return - {"tag1" => { "attr1" => ''1'', "__content__" => "Content" } 2. Mixed content can throw an error or get clobbered - <tag1>Content <em>is</em> Clobbered</tag1> #=> Raises a Private error called on array gsub - <tag1>Content <em>is</em></tag1> #=> Clobbered. Returns {"tag1"=>"Content "} - Feels like it sho...
2016 Dec 22
5
Understanding SlotIndexes
Hi all, I'm tracking down a register allocation problem and I'm trying to understand this piece of code in InlineSpiller::spillAroundUses: // Find the slot index where this instruction reads and writes OldLI. // This is usually the def slot, except for tied early clobbers. SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot(); if (VNInfo *VNI =
2015 Jul 29
2
[LLVMdev] optimizer clobber EFLAGS
...; preds = %entry, %if.end %retval.0 = phi i32 [ 0, %if.end ], [ 1, %entry ] ret i32 %retval.0 --- The constraint doesn't appear to do anything which is not totally surprising. I'm thinking that the "cc" constraint tells the optimizer that "EFLAGS has been clobbered". What we need is a way to tell the optimizer that "EFLAGS has been clobbered and the new value in EFLAGS needs to be preserved (so don't clobber it)." - michael
2010 Oct 20
4
[LLVMdev] llvm register reload/spilling around calls
On Oct 19, 2010, at 8:00 PM, Jakob Stoklund Olesen wrote: > > > One problem is that calling conventions are handled while building the selection DAG, and the DAG doesn't really know to represent clobbered registers. > > Perhaps X86TargetLowering::LowerCall() could decorate the X86ISD::CALL node with the calling convention somehow? > > Dan, do you have any thoughts on how to communicate the calling convention and call clobbered registers to the eventual CALL MachineInstr? The simplest...
2013 Jan 08
2
[LLVMdev] Inline asm bug?
Consider this program: --- asm.c --- int G; int foo(char *p) { int rv; G = 0; asm ("" : "=r"(rv) : "r"(p) : "memory"); return rv + G; } ------------- Is the use of "memory" clobber sufficient to expect the optimizer not to optimize the "+ G" away in the return statement? I'll add here that
2016 Jul 15
4
RFC: To add __attribute__((regmask("preserve/clobbered list here"))) in clang
...dule. IPRA's scope is limited to a module so for such externally defined function it uses default calling convention but here as the function is written in assembly user can provide exact register usage detials. So we dicided to mark declration of such function with __attribute__((regmask("clobbered list here"))) so LLVM can construct regmask out of it and use it with IPRA to improve register allocation. For this purpose I added support for this attribute in clang and clang codegen this attribute as target dependent attribute and add to declaration. Then IPRA constructs regmask from this...
2016 Apr 07
2
Inline asm clobber registers name
Hi all, I am currently working on AMDGPU inline assembly and encountered problem with naming clobber registers in asm constraints. It looks like by default LLVM tries to match register specified in constraint to register name of register definition in .td file but not to the AsmName for this register. For example if we have register definition: def MYReg0 : Register<"r0", 0>;
2015 Jul 29
0
[LLVMdev] optimizer clobber EFLAGS
...d > %retval.0 = phi i32 [ 0, %if.end ], [ 1, %entry ] > ret i32 %retval.0 > > --- > > The constraint doesn't appear to do anything which is not totally > surprising. I'm thinking that the "cc" constraint tells the optimizer that > "EFLAGS has been clobbered". What we need is a way to tell the optimizer > that "EFLAGS has been clobbered and the new value in EFLAGS needs to be > preserved (so don't clobber it)." > > - michael > > _______________________________________________ > LLVM Developers mailing list > L...
2013 Jan 08
0
[LLVMdev] Inline asm bug?
...ue, Jan 8, 2013 at 2:17 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > On 1/8/2013 3:52 PM, Eli Friedman wrote: >> >> >> From gcc docs: "If your assembler instructions access memory in an >> unpredictable fashion, add `memory' to the list of clobbered >> registers. This causes GCC to not keep memory values cached in >> registers across the assembler instruction and not optimize stores or >> loads to that memory. You also should add the volatile keyword if the >> memory affected is not listed in the inputs or outputs of th...
2012 Nov 29
1
[LLVMdev] clang modifying clobbered register in case of inline assembly resulting in data corruption
...quot;edx"); printf("data[0] = %x \n",data[0]); printf("data[1] = %x \n",data[1]); printf("data[2] = %x \n",data[2]); printf("data[3] = %x \n",data[3]); return 0; } In this case the value of data[0] has got corrupted as clang is not honoring clobbered register and stores a different value in $eax. Similarly when compiled with -fPIE option, GCC emits an error as - i386-pseudo.c: In function ‘main’: i386-pseudo.c:13:3: error: PIC register clobbered by ‘ebx’ in ‘asm’ i386-pseudo.c:22:3: error: PIC register clobbered by ‘ebx’ in ‘asm’ Clang comp...
2015 Dec 04
2
analyzePhysReg question
...rs is for. > > I think Clobbers is when there is a RegMask. > Basically, if that helps, > Clobber: The register cannot live through. > Define: (Part of) the register is define by this instruction. Put differently, you can use a register as a definition of an instruction when it is clobbered but not defined. > >> The interface for isSuperRegister >> certainly makes a pretty clear distinction between something being a superRegister and something being an >> overlapping register. What do you think I should be checking to understand the assumptions/expectations be...
2015 Jun 12
2
[LLVMdev] Prevent instruction selection from clobbering an implicit data dependence through flags?
Hi, In my target, certain intrinsic functions read or write the machine's flag registers. Some of my benchmarks rely on implicit data dependences among such intrinsics. How can I specify that these intrinsics carry this dependence, and that this dependence should be preserved through instruction selection? For example, suppose I have this snippet of IR: ; (i) Write to flags tail call
2017 Oct 04
0
[PATCH 08/13] x86/paravirt: Clean up paravirt_types.h
Make paravirt_types.h more understandable: - Use more consistent and logical naming - Simplify interfaces - Put related macros together - Improve whitespace Signed-off-by: Josh Poimboeuf <jpoimboe at redhat.com> --- arch/x86/include/asm/paravirt_types.h | 104 ++++++++++++++++++---------------- 1 file changed, 54 insertions(+), 50 deletions(-) diff --git