Wei, Gang
2008-Sep-19 15:51 UTC
[Xen-devel] [PATCH 2/2] CPUIDLE: Handle C2 LAPIC timer & TSC stop
ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok'' can be used to select simple C2 entry/exit only if the user make sure that LAPIC tmr & TSC will not be stopped during C2. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
Maybe Matching Threads
- [PATCH 0/2] CPUIDLE: fixings for multiple C3 & C2 LAPIC stop
- [PATCH 2/4] CPUIDLE: Avoid remnant LAPIC timer intr while force hpetbroadcast
- [PATCH]CPUIDLE: Initialize timer broadcast mechanism for C2
- [PATCH] Fix lapic timer stop issue in deep C state
- late lapic timer interrupts for hvm guest
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