search for: lapic_timer_c2_ok

Displaying 2 results from an estimated 2 matches for "lapic_timer_c2_ok".

[PATCH 0/2] CPUIDLE: fixings for multiple C3 & C2 LAPIC stop
2008 Sep 19
0
[PATCH 0/2] CPUIDLE: fixings for multiple C3 & C2 LAPIC stop
...ates mapped into different CPU C-states.So made some modification to support this case. [PATCH 2/2] Handle C2 LAPIC timer & TSC stop. ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok'' can be used to select simple C2 entry/exit only if the user make sure that LAPIC tmr & TSC will not be stop during C2. Jimmy _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
[PATCH 2/2] CPUIDLE: Handle C2 LAPIC timer & TSC stop
2008 Sep 19
0
[PATCH 2/2] CPUIDLE: Handle C2 LAPIC timer & TSC stop
ACPI C2 is quite possible mapped to CPU C3 or deeper state, so thinking from worst cases, enable C3 like entry/exit handling for C2 by default. Option ''lapic_timer_c2_ok'' can be used to select simple C2 entry/exit only if the user make sure that LAPIC tmr & TSC will not be stopped during C2. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://l...