llvm dev - Jul 2017 - Lowering Select to Two Predicated Movs

My bad for not looking further. I'm still somewhat confused though. MOVCCr
gets expanded in the ARMExpandPseudoInsts pass, and it still seems only a
case of one instruction replacing the other.

My worry of emitting two instructions, is that a dead code pass will
eliminate the first instruction cause it thinks the second instruction is
defining the same register.

-Dilan

On Fri, Jul 7, 2017 at 11:20 AM Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 7/7/2017 11:12 AM, Dilan Manatunga via llvm-dev wrote:
> > Hi,
> >
> > I was wondering what would be the best way to lower a select operation
> > two predicated movs. I looked through the ARM, MIPS, and NVPTX
> > backends and they all seem to lower a select to some sort of
> > conditional move or native select operation.
>
> ARM lowers a select to a predicated mov.  MOVCCr is a pseudo-instruction
> which gets expanded after instruction selection.
>
> -Eli
>
> --
> Employee of Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux
> Foundation Collaborative Project
>
>
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On 7/7/2017 12:10 PM, Dilan Manatunga wrote:
> My bad for not looking further. I'm still somewhat confused though. 
> MOVCCr gets expanded in the ARMExpandPseudoInsts pass, and it still 
> seems only a case of one instruction replacing the other.
The output of MOVCCr is tied to the "false" input using RegConstraint.
The register allocator puts the "false" value into the destination 
register, then MOVCCr gets expanded to a predicated MOVr which moves the 
"true" value into the destination register.

-Eli

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux
Foundation Collaborative Project

Ohh, that makes sense. And is the reason the first instruction doesn't get
deleted because the ExpandPseudoInstructions pass occurs after Register
Allocation and machine dead code elimination?

-Dilan

On Fri, Jul 7, 2017 at 12:37 PM Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 7/7/2017 12:10 PM, Dilan Manatunga wrote:
> > My bad for not looking further. I'm still somewhat confused
though.
> > MOVCCr gets expanded in the ARMExpandPseudoInsts pass, and it still
> > seems only a case of one instruction replacing the other.
>
> The output of MOVCCr is tied to the "false" input using
RegConstraint.
> The register allocator puts the "false" value into the
destination
> register, then MOVCCr gets expanded to a predicated MOVr which moves the
> "true" value into the destination register.
>
> -Eli
>
> --
> Employee of Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux
> Foundation Collaborative Project
>
>
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