llvm dev - Dec 2016 - Immediate operand for vector instructions

Hello.
     Tim, indeed the TableGen spec I presented in the previous email has a small
error
related to what you have written - the patter does not allow i64imm. So because
of the line:
   list<dag> Pattern = [(int_connex_repeat_x_times i64imm:$imm)];
     I get the following TableGen error:
    <<Unknown leaf kind: i64imm:i64:$imm>>

      But if I correct that error, following also your suggestion, and have the
following
code (reproduced for convenience):
          class REP_1R_DESC_BASE<,
                                      InstrItinClass itin = NoItinerary> {
            dag OutOperandList = (outs);
            /* From include/llvm/Target/Target.td:
               let OperandType = "OPERAND_IMMEDIATE" in {
                 ...
               def i64imm : Operand<i64>; */
            dag InOperandList = (ins i64imm:$imm);

            string AsmString = "REPEAT_X_TIMES($imm";
            list<dag> Pattern = [(int_repeat_x_times i64:$imm)];
            InstrItinClass Itinerary = itin;
          }
          class REP_D_DESC : REP_1R_DESC_BASE;
          class REP_D_ENC :  MSA_I16_FMT<0b101010111>;
          def REP_D: REP_D_ENC, REP_D_DESC;

    We can compile it. Note that this is the only compilable code w.r.t. using
i64 or
i64imm (in the 2 lines above: "dag InOperandList",
"list<dag> Pattern").

     However, the problem I was asking help in the previous email still
persists: to my
big surprise (because the property OperandType = "OPERAND_IMMEDIATE"
implies that i64imm
is an immediate operand), the resulting ASM codegen'ed by the instruction
selector
contains a mov and REPEAT_X_TIMES uses a register although I was expecting it to
use an
immediate register:
          mov     r1, 32767               // <MCInst #75 MOV_ri
                                          //  <MCOperand Reg:2>
                                          //  <MCOperand Imm:32767>>
          REPEAT_X_TIMES(r1);
          ...

   Best regards,
     Alex


On 12/5/2016 8:15 PM, Tim Northover wrote:
> On 3 December 2016 at 14:42, Alex Susu via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
>>           list<dag> Pattern = [(int_repeat_x_times i64imm:$imm)];
>
> i64imm isn't usable in patterns by default, so what have you really
> written? The operand should probably be "imm:$imm", and
"i64:$imm"
> definitely gives the behaviour you're describing.
>
> Cheers.
>
> Tim.
>

Hi Alex,

On 5 December 2016 at 18:00, Alex Susu <alex.e.susu at gmail.com>
wrote:
>    We can compile it. Note that this is the only compilable code w.r.t.
> using i64 or i64imm (in the 2 lines above: "dag InOperandList",
"list<dag>
> Pattern").
Yeah, you actually want to use "imm":

    list<dag> Pattern = [(int_repeat_x_times imm:$imm)];

When the table generator sees "i64" it doesn't go looking in the
InOperandList to determine that the operand should be an immediate. It
just matches anything and shoves it into a register. It *does* know
about "imm" though because that's defined to match up to an
ISD::Constant SDNode.

Cheers.

Tim.

Hello.
     Tim, thank you for the observations. This is the one thing that I
haven't tried in
the previous email :) . So the complete correct specification is:
       class REPEAT_DESC_BASE<InstrItinClass itin = NoItinerary> {
         dag OutOperandList = (outs);
         dag InOperandList = (ins i64imm:$imm);
         string AsmString = "REPEAT_X_TIMES($imm );";
         list<dag> Pattern = [(int_connex_repeat_x_times imm:$imm)];
         bit hasSideEffects = 1;
         InstrItinClass Itinerary = itin;
       }

     Although not relevant I guess, these were the error messages I got when
using
different types:
         - <<Unknown leaf kind: i64imm:i64:$imm>>
           when using:
             list<dag> Pattern = [(int_connex_repeat_x_times
i64imm:$imm)];
         - <<error:Unknown operand class 'imm' in
'REPEAT_D' instruction!>>
           when using:
             dag InOperandList = (ins i64imm:$imm);


   Best regards,
     Alex

On 12/6/2016 4:27 AM, Tim Northover wrote:
> Hi Alex,
>
> On 5 December 2016 at 18:00, Alex Susu <alex.e.susu at gmail.com>
wrote:
>>    We can compile it. Note that this is the only compilable code w.r.t.
>> using i64 or i64imm (in the 2 lines above: "dag
InOperandList", "list<dag>
>> Pattern").
>
> Yeah, you actually want to use "imm":
>
>     list<dag> Pattern = [(int_repeat_x_times imm:$imm)];
>
> When the table generator sees "i64" it doesn't go looking in
the
> InOperandList to determine that the operand should be an immediate. It
> just matches anything and shoves it into a register. It *does* know
> about "imm" though because that's defined to match up to an
> ISD::Constant SDNode.
>
> Cheers.
>
> Tim.
>