Adam Strzelecki
2013-Nov-22 14:48 UTC
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
>> + bool HasAVX2 = HasAVX && !GetX86CpuIDAndInfo(0x7, &EAX, &EBX, &ECX, &EDX) && >> + (EBX & 0x20); > > I don't think this guarantees %ecx is 0, does it? Wasn't that the > entire reason the original code went wrong?I don’t remember really, but presuming the conclusions of the discussion, seems it is fixed now. It was something about registers when using inline assembly. Anyway this works just fine on all my Haswell machines. Regards, -- Adam
Tim Northover
2013-Nov-22 15:34 UTC
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> I don’t remember really, but presuming the conclusions of the discussion, seems it is fixed now. It was something about registers when using inline assembly. Anyway this works just fine on all my Haswell machines.I think that's more coincidence than anything else (something perturbed in your host compiler's backend). If you look at lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp there's a GetCpuIDAndInfoEx function which specifically sets %ecx to a valid value before executing "cpuid". The code in Host.cpp needs to do something similar. Cheers. Tim.
Craig Topper
2013-Nov-23 04:59 UTC
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
I agree with Tim, you need to implement a GetCpuIDAndInfoEx function in Host.cpp and pass the correct value to ecx. Also you need to verify that 7 is a valid leaf because an invalid leaf is defined to return the highest supported leaf on that processor. So if a processor supports say leaf 6 and not leaf 7, then an access leaf 7 will return the data from leaf 6 causing unrelated bits to be interpretted as feature flags for AVX etc. On Fri, Nov 22, 2013 at 7:34 AM, Tim Northover <t.p.northover at gmail.com>wrote:> > I don’t remember really, but presuming the conclusions of the > discussion, seems it is fixed now. It was something about registers when > using inline assembly. Anyway this works just fine on all my Haswell > machines. > > I think that's more coincidence than anything else (something > perturbed in your host compiler's backend). If you look at > lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp there's a > GetCpuIDAndInfoEx function which specifically sets %ecx to a valid > value before executing "cpuid". > > The code in Host.cpp needs to do something similar. > > Cheers. > > Tim. > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >-- ~Craig -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131122/4c209343/attachment.html>
Apparently Analagous Threads
- [LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
- [LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
- [LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
- [LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
- [LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)