search for: subarchitecture

Displaying 20 results from an estimated 59 matches for "subarchitecture".

2006 Jan 23
2
linux-2.6-xen.hg: Selecting "Xen-compatible" subarchitecture makes most of the drivers unselectable
Hi list! What''s the correct way to solve this problem? When you select "Xen-compatible" subarchitecture most of the drivers (network,scsi,etc) disappear from the menuconfig.. Currently linux-2.6-xen.hg repository is unusable (as is).. for dom0 and domU also. -- Pasi Kärkkäinen ^ . . Linu...
2017 Feb 07
2
Clang option to provide list of target-subarchs.
There are at least four clang frontends for offloading to accelerators: 1 Cuda clang 2 OpenMP 3 HCC and 4 OpenCL. These frontends will want to embed object code for multiple offload targets into a single application binary to provide portability across different subarchitectures (e.g. sm_35, sm_50) and across different architectures (e.g nvptx64,amdgcn). Problem: Different frontends are using different flags to provide a list of subarchitectures. For example, cuda clang repeats the flag “--cuda-gpu-arch=sm_35 --cuda-gpu-arch=sm_50” and HCC uses “--amdgpu-target=g...
2013 Sep 13
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> I think your real problem is that garbage went into ECX instead of 0 and > caused cpuid to return 0. Ah, that looks very likely. The value seems to come from "xorl %eax, %eax" in both good object files, but a previous cpuid in the bad one. Excellent work Craig, I suspect that would have taken me days to find. Tim.
2013 Nov 22
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Hi Adam, > + bool HasAVX2 = HasAVX && !GetX86CpuIDAndInfo(0x7, &EAX, &EBX, &ECX, &EDX) && > + (EBX & 0x20); I don't think this guarantees %ecx is 0, does it? Wasn't that the entire reason the original code went wrong? Cheers. Tim.
2013 Nov 22
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
>> + bool HasAVX2 = HasAVX && !GetX86CpuIDAndInfo(0x7, &EAX, &EBX, &ECX, &EDX) && >> + (EBX & 0x20); > > I don't think this guarantees %ecx is 0, does it? Wasn't that the > entire reason the original code went wrong? I don’t remember really, but presuming the conclusions of the discussion, seems it is fixed now. It
2013 Nov 22
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> I don’t remember really, but presuming the conclusions of the discussion, seems it is fixed now. It was something about registers when using inline assembly. Anyway this works just fine on all my Haswell machines. I think that's more coincidence than anything else (something perturbed in your host compiler's backend). If you look at lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
2013 Nov 22
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> I promise I'll do the review of your code after that. Tim, I don’t want to push too much. But since there’s 3.4 release on the horizon, maybe you could find a moment review this patch. Especially Haswell is all there since few months. Cheers, -- Adam --- lib/Support/Host.cpp | 8 ++++++++ lib/Target/X86/X86Subtarget.cpp | 3 ++- 2 files changed, 10 insertions(+), 1
2013 Sep 12
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Hi Adam, > * I have marked HasAVX2 as "volatile", since otherwise it gets > magically zeroed (by optimizer?) when compiling clang with latest > clang build from trunk That's far more worrying to me than not being able to detect Haswell. I can't reproduce the problem here at the moment: both debug and release builds give identical assembly for Host.cpp. I don't
2013 Sep 13
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Actually there is no miscompile there as esi isn't needed. The flags are which the cmove is using. 342: shr esi,0x5 345: lea rbp,[rip+0x0] # 34c <llvm::sys::getHostCPUName()+0xbc> 34c: lea r12,[rip+0x0] # 353 <llvm::sys::getHostCPUName()+0xc3> 353: cmove rbp,r12 <- this is dependent on the flags from the shift. I think your real problem is
2013 Sep 12
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Hi Adam, > OK. I know the reason you cannot reproduce it, before posting > the patch I've decided to check for AVX before checking AVX2, > just not to cpuid AVX2 when we don't have AVX1 anyway. I suspect it was also incompetence on my part. Given the differences I'm seeing now I can't believe there'd be *no* difference in my tests if I'd done them properly.
2007 Apr 27
3
The virtuailization patches break Voyager.
...looked at arch/i386 in the -mm tree and it feels like I am tripping over significant bugs left and right. Because no one has heeded my advice and put in a proper platform layer on arch/i386 and we are instead doing a half baked job with paravirt_ops it is still trivially easy to miss the fact that subarchitectures do something different, and thus it is easy to miss when you break a sub architecture on arch/i386. Not that the paravirtuailzation patches are even safe on the primary arch/i386. To some extent I grant with major changes a little goofing up on pending patches is to be expected, but it would be...
2007 Apr 27
3
The virtuailization patches break Voyager.
...looked at arch/i386 in the -mm tree and it feels like I am tripping over significant bugs left and right. Because no one has heeded my advice and put in a proper platform layer on arch/i386 and we are instead doing a half baked job with paravirt_ops it is still trivially easy to miss the fact that subarchitectures do something different, and thus it is easy to miss when you break a sub architecture on arch/i386. Not that the paravirtuailzation patches are even safe on the primary arch/i386. To some extent I grant with major changes a little goofing up on pending patches is to be expected, but it would be...
2013 Sep 13
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Pretty sure you need to check EAX>=7 from cpuid leaf 0 before calling leaf 7 and you need to use the pass ECX=0 to leaf 7. See lib/Target/X86/X86Subtarget.cpp which uses a GetX86CpuIDAndInfoEx function to pass EAX and ECX to cpuid. I don't think it explains your compiler bug though. On Thu, Sep 12, 2013 at 2:12 PM, Adam Strzelecki <ono at java.pl> wrote: > > Anyway, thanks
2013 Sep 12
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Hello, This is my first patch on this list, however I've already submitted several trough bug tracking system. Since it probably needs some review and it's not a bug I am submitting it here. The main intent of this patch is to detect "core-avx2" platform on Haswell i7 CPUs when running -march=native. Currently it detects it as generic x86_64. lib/Support/Host.cpp: * Haswell is
2013 Nov 23
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Here we go, updated patch following your advice checking max leaf and porting cpuidex for subleaf (ECX) 0. NOTE: I’ve set Haswell to be not only 60, but also 63, 69 & 70 model, following changes in Linux kernel & Xen. Also set 62 as Ivy Bridge EP aka E5 v3 (which I has in my workstation). Cheers, -- Adam Detects x86 family 6 model 60, 63, 69, 70 CPU that has AVX2 CPUID leaf 7 subleaf
2013 Sep 12
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> Anyway, thanks very much for the information. Hopefully that'll let me > track things down. Let me know if you need some more information or dumps. > Would you mind me taking a day or so to investigate what's going on > here properly? Introducing a volatile to work around a bug in Clang > itself just seems perverse to me. (And we shouldn't let a CodeGen bug >
2013 Sep 12
3
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> That's far more worrying to me than not being able to detect Haswell. > I can't reproduce the problem here at the moment: both debug and > release builds give identical assembly for Host.cpp. OK. I know the reason you cannot reproduce it, before posting the patch I've decided to check for AVX before checking AVX2, just not to cpuid AVX2 when we don't have AVX1 anyway.
2013 Nov 23
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
I agree with Tim, you need to implement a GetCpuIDAndInfoEx function in Host.cpp and pass the correct value to ecx. Also you need to verify that 7 is a valid leaf because an invalid leaf is defined to return the highest supported leaf on that processor. So if a processor supports say leaf 6 and not leaf 7, then an access leaf 7 will return the data from leaf 6 causing unrelated bits to be
2008 Jan 31
0
[PATCH] x86: use ELF format in compressed images.
...ion/i386/boot.txt b/Documentation/i386/boot.txt index fc49b79..b5f5ba1 100644 --- a/Documentation/i386/boot.txt +++ b/Documentation/i386/boot.txt @@ -170,6 +170,8 @@ Offset Proto Name Meaning 0238/4 2.06+ cmdline_size Maximum size of the kernel command line 023C/4 2.07+ hardware_subarch Hardware subarchitecture 0240/8 2.07+ hardware_subarch_data Subarchitecture-specific data +0248/4 2.08+ compressed_payload_offset +024C/4 2.08+ compressed_payload_length (1) For backwards compatibility, if the setup_sects field contains 0, the real value is 4. @@ -512,6 +514,22 @@ Protocol: 2.07+ A pointer to...
2008 Jan 31
0
[PATCH] x86: use ELF format in compressed images.
...ion/i386/boot.txt b/Documentation/i386/boot.txt index fc49b79..b5f5ba1 100644 --- a/Documentation/i386/boot.txt +++ b/Documentation/i386/boot.txt @@ -170,6 +170,8 @@ Offset Proto Name Meaning 0238/4 2.06+ cmdline_size Maximum size of the kernel command line 023C/4 2.07+ hardware_subarch Hardware subarchitecture 0240/8 2.07+ hardware_subarch_data Subarchitecture-specific data +0248/4 2.08+ compressed_payload_offset +024C/4 2.08+ compressed_payload_length (1) For backwards compatibility, if the setup_sects field contains 0, the real value is 4. @@ -512,6 +514,22 @@ Protocol: 2.07+ A pointer to...