Hi all, I recently created a version of llvm/clang for an architecture with some odd properties: - front end side: -- char,short,int : 20 bits -- long, long long: 40 bits -- pointer: 20 bits On the backend side, I have hardware support for 20-bit registers (and load/stores). (So, I have support for 'i20' and 'i40', but 'i40' is lowered into operations on 'i20') In order to achieve this, I did need to modify a number of generic llvm and clang files. I was wondering if other people would be interested to see support for these kind of architectures in llvm and if llvm/clang would accept such improvements. In that case, I can make time to clean up these changes, make the current dependency on 'MVT::i20' and 'MVT::i40' more generic and provide them in easy-to-review chunks. Greetings, Jeroen Dobbelaere
On 24/09/13 16:02, Jeroen Dobbelaere wrote:> 'MVT::i20' and 'MVT::i40' more generic and provide them in easy-to-review chunks.I think it would certainly a cool feature to have as some custom architecture actually not always follow the standard power of two bit sizes and being more flexible on that size can't hurt definitely! -- Marcello Maggioni Compiler Engineer Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com Twitter: https://twitter.com/@codeplaybiz This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are not the intended recipient, please notify Codeplay Software Ltd immediately and delete the message from your computer. You may not copy or forward it,or use or disclose its contents to any other person. Any views or other information in this message which do not relate to our business are not authorized by Codeplay software Ltd, nor does this message form part of any contract unless so stated. As internet communications are capable of data corruption Codeplay Software Ltd does not accept any responsibility for any changes made to this message after it was sent. Please note that Codeplay Software Ltd does not accept any liability or responsibility for viruses and it is your responsibility to scan any attachments. Company registered in England and Wales, number: 04567874 Registered office: 81 Linkfield Street, Redhill RH1 6BY
Seemingly Similar Threads
- [LLVMdev] [PATCH] Making Type::getScalarSizeInBits() const
- [LLVMdev] Predication on SIMD architectures and LLVM
- [LLVMdev] Comment "FIXME" in X86MachObjectWriter::RecordX86Relocation
- [LLVMdev] Predication on SIMD architectures and LLVM
- [LLVMdev] Predication on SIMD architectures and LLVM