search for: codeplay

Displaying 20 results from an estimated 133 matches for "codeplay".

2019 Jul 18
2
Question about TableGen RegisterClass definition
...gisterClass's RegSize and Alignment 2. SpillSize in TableGen 3. Type constraint for instruction pattern matching >From my opinion, it seems it is possible to do it... but I am not 100% sure... If anyone has information about it, please give me comment. Thanks JinGu Kang Software Engineer Codeplay Software Ltd Level C Argyle House, 3 Lady Lawson Street, Edinburgh, United Kingdom, EH3 9DR<http://maps.google.co.uk/?q=EH3%209DR> Tel: +44 (0)131 466 0503 Website: http://www.codeplay.com<http://www.codeplay.com/> Twitter: https://twitter.com/codeplaysoft This email and any attachment...
2012 Oct 19
11
[LLVMdev] Predication on SIMD architectures and LLVM
...really mainly only need one type of predicate , so every instruction could use that kind of predicate ...) but I think this is a nasty solution ... Did someone already tried to do this in LLVM and if yes what solution/s did you use to solve the problem? Regards, Marcello -- Marcello Maggioni Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com Twitter: https://twitter.com/codeplaysoft This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are no...
2012 Jun 29
2
[LLVMdev] Comment "FIXME" in X86MachObjectWriter::RecordX86Relocation
...ould hit this. (Although I haven't tried it) I'm using Windows 32bit x86 Mach-O, with MCJIT. Trying to find a bug within my program and wondered whether the code is just not supported by LLVM. Let me know if you need a testcase. Thanks! -- Verena Beckham Vice President Engineering Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are not the intended recipient, please notif...
2018 Aug 09
2
[DWARF] prologue_end fix not working for VLIW
...first instruction not in the prologue. I couldn't find anything official about the placement in this case in the DWARF spec. Since I am working on a custom target I'm afraid I can't provide any test cases... Thanks, -- Verena Beckham Senior Principal Software Engineer, Compilers Codeplay Software Ltd Level C, Argyle House, 3 Lady Lawson Street, Edinburgh, EH3 9DR Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are not the in...
2012 Oct 19
0
[LLVMdev] Predication on SIMD architectures and LLVM
...every instruction could use that kind of predicate ...) but I think > this is a nasty solution ... > > Did someone already tried to do this in LLVM and if yes what solution/s > did you use to solve the problem? > > Regards, > Marcello > > -- > Marcello Maggioni > Codeplay Software Ltd > 45 York Place, Edinburgh, EH1 3HP > Tel: 0131 466 0503 > Fax: 0131 557 6600 > Website: http://www.codeplay.com > Twitter: https://twitter.com/codeplaysoft > > This email and any attachments may contain confidential and /or > privileged information and is for...
2017 Jul 26
2
isSSA computation in MIR parser
...reg.mir) has a hack around this by inserting an additional COPY to a register, but that shouldn't be required. It means tests that are generated using llc might be failing because they are wrongly identified as SSA. Thanks, -- Verena Beckham Senior Principal Software Engineer, Compilers Codeplay Software Ltd Level C, Argyle House, 3 Lady Lawson Street, Edinburgh, EH3 9DR Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are not the in...
2013 Nov 21
1
[LLVMdev] [PATCH] Making Type::getScalarSizeInBits() const
..."const" functions and types. This prevents the usage of the function through const pointers/references to Type without any apparent reason. I propose of marking the function as const. (attached is a patch that does so). Cheers, Marcello -- Marcello Maggioni Compiler Engineer Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com Twitter: https://twitter.com/@codeplaybiz This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If...
2012 Oct 19
0
[LLVMdev] Predication on SIMD architectures and LLVM
...very instruction could use that kind of predicate ...) but I think > this is a nasty solution ... > > Did someone already tried to do this in LLVM and if yes what > solution/s did you use to solve the problem? > > Regards, > Marcello > > -- > Marcello Maggioni > Codeplay Software Ltd > 45 York Place, Edinburgh, EH1 3HP > Tel: 0131 466 0503 > Fax: 0131 557 6600 > Website: http://www.codeplay.com > Twitter: https://twitter.com/codeplaysoft > > This email and any attachments may contain confidential and /or privileged information and is for use b...
2012 Jun 27
3
[LLVMdev] Counting instructions in MCJIT
...ineFunctionPass to do the same, but I can find no way of inserting that into the PassManager that MCJIT uses. This means I'm replicating the passes and doing code gen twice, basically. Any advice would be much appreciated! Thank you very much, -- Verena Beckham Vice President Engineering Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are not the intended recipient, please notif...
2012 Jun 29
2
[LLVMdev] Comment "FIXME" in X86MachObjectWriter::RecordX86Relocation
...nce you start passing in non-trivial code. The relocation model is very tied to Darwin. I believe some folks doing JIT on Windows have had some success w/ ELF. Hopefully someone more familiar with the specifics of that will chime in. -Jim On Jun 29, 2012, at 8:58 AM, Verena Beckham <verena at codeplay.com> wrote: > Hi, > > In X86MachObjectWriter::RecordX86Relocation I found the comment > > > if (Target.isAbsolute()) { // constant > // SymbolNum of 0 indicates the absolute section. > // > // FIXME: Currently, these are never generated (see code belo...
2012 Jun 29
0
[LLVMdev] Comment "FIXME" in X86MachObjectWriter::RecordX86Relocation
...nce you start passing in non-trivial code. The relocation model is very tied to Darwin. I believe some folks doing JIT on Windows have had some success w/ ELF. Hopefully someone more familiar with the specifics of that will chime in. -Jim On Jun 29, 2012, at 8:58 AM, Verena Beckham <verena at codeplay.com> wrote: > Hi, > > In X86MachObjectWriter::RecordX86Relocation I found the comment > > > if (Target.isAbsolute()) { // constant > // SymbolNum of 0 indicates the absolute section. > // > // FIXME: Currently, these are never generated (see code belo...
2017 Sep 18
1
Resend: assertion in MachineCopyPropagation::isNopCopy
...InstrEmitter::EmitSubregNode at // Create the extract_subreg machine instruction. So it's not out-of-tree code. Am I missing something or should the assert condition be part of the "if" condition instead? Thanks, -- Verena Beckham Senior Principal Software Engineer, Compilers Codeplay Software Ltd Level C, Argyle House, 3 Lady Lawson Street, Edinburgh, EH3 9DR Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are not the in...
2012 Jul 02
0
[LLVMdev] Comment "FIXME" in X86MachObjectWriter::RecordX86Relocation
...on-trivial code. The relocation model is very tied to Darwin. > > I believe some folks doing JIT on Windows have had some success w/ ELF. Hopefully someone more familiar with the specifics of that will chime in. > > -Jim > > On Jun 29, 2012, at 8:58 AM, Verena Beckham<verena at codeplay.com> wrote: > >> Hi, >> >> In X86MachObjectWriter::RecordX86Relocation I found the comment >> >> >> if (Target.isAbsolute()) { // constant >> // SymbolNum of 0 indicates the absolute section. >> // >> // FIXME: Currently...
2013 May 09
2
[LLVMdev] Scheduling with RAW hazards
...vely disabled, so I changed it to use the ScoreboardHazardRecognizer instead. I'm also still using the SelectionDAG scheduler, but will need to change to the MI scheduler at some point, to keep up with trunk. Should either of these help? Thanks, Fraser -- Fraser Cormack Compiler Developer Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com Twitter: https://twitter.com/codeplaysoft This email and any attachments may contain confidential and /or privileged information and is for use by the addressee only. If you are no...
2017 Jan 27
2
Preserving Call to Intrinsic function
Hello everyone, Consider we have this following set of code: int foo() { int a,b; a = __builtin_XX(0x11); b = __builtin_XX(0x11); return a+b; } The problem currently is that LLVM eliminated the second call and copied the result from the first call into a new set of registers. Is there is a way to force LLVM to generate two explicit calls to a builtin function. The builtin takes in an integer
2017 Sep 17
2
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
Please open a bugzilla ticket and attach your testcase. It will allow us to debug and fix the problem. Thanks - Elena From: JinGu [mailto:jingu at codeplay.com] Sent: Saturday, September 16, 2017 00:38 To: Demikhovsky, Elena <elena.demikhovsky at intel.com>; daniel_l_sanders at apple.com <daniel_l_sanders at apple.com>; Jon Chesterfield <jonathanchesterfield at gmail.com> Cc: llvm-dev at lists.llvm.org Subject: Re: Question about ...
2017 Sep 18
1
Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
...} else { > return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr, MachinePointerInfo(), EltVT); > } I assume that we need the opposite - if (.. < 8) getExtLoad // VT should be MVT::i8, MemVT should be MVT::i1 else getLoad - Elena From: jingu at codeplay.com [mailto:jingu at codeplay.com] Sent: Monday, September 18, 2017 13:40 To: Demikhovsky, Elena <elena.demikhovsky at intel.com>; daniel_l_sanders at apple.com <daniel_l_sanders at apple.com>; Jon Chesterfield <jonathanchesterfield at gmail.com> Cc: llvm-dev at lists.llvm.org Sub...
2018 Sep 27
2
Ubuntu LLVM packages incompatible with clang built projects?
Hi folks, Not sure if this is the right mailing list target, but I'm trying out the new LLVM 7.0 packages found at http://apt.llvm.org by porting over an existing LLVM 6.0 project of ours to the new version. In doing so, I found that the executable always segfaulted at the same spot with no explanation: 0x0000000000fefe33 in
2012 Jun 28
0
[LLVMdev] Counting instructions in MCJIT
...e result of "-stats" option. I think that we can count the number of instructions per module using Statistic class. Regards, Jin-Gu Kang ________________________________________ From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] On Behalf Of Verena Beckham [verena at codeplay.com] Sent: Wednesday, June 27, 2012 6:22 PM To: llvmdev at cs.uiuc.edu Subject: [LLVMdev] Counting instructions in MCJIT Hi there, I wondered whether anyone could give me any advice about counting assembly instructions when using MCJIT? For performance regression testing I would like to be able t...
2014 Mar 04
2
[LLVMdev] Question about per-operand machine model
On Mar 4, 2014, at 10:05 AM, Pete Cooper <peter_cooper at apple.com> wrote: > > On Mar 3, 2014, at 2:21 PM, Andrew Trick <atrick at apple.com> wrote: > >> >> On Mar 3, 2014, at 8:53 AM, Pierre-Andre Saulais <pierre-andre at codeplay.com> wrote: >> >>> Hi Andrew, >>> >>> We are currently using a custom model where scheduling information is attached to each MCInstrDesc through tablegen, and we're trying to move to one of LLVM's models. >>> >>> To expand on what Jin...