Hi All, Does LLVM currently have any power/energy reduction optimizations or any performance optimizations that take power/energy consumption into account? We are currently working on a research project on instruction scheduling for low power (experimenting with different algorithms for minimizing switching power) and would like to find out if anyone in the LLVM community is interested in adding this feature to LLVM. Regards Ghassan Shobaki, PH.D Assistant Professor Department of Computer Science Princess Sumaya University for Technology Amman, Jordan -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130414/bf1ca8a0/attachment.html>
See http://llvm.org/bugs/show_bug.cgi?id=6210. -- Sean Silva -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130415/e948b489/attachment.html>
Thank you for the link! It is not clear though what -Oe actually implements. Does it simply optimize for speed as suggested by Chris or it does other things? Generally speaking, speed correlates well with low energy, because completing the task in fewer cycles means consuming less energy unless the speed optimization causes the energy per cycle to be significantly higher. In theory, some compiler and hardware optimizations such as instruction-level parallelism (ILP), speculative execution and pre-fetching increase the energy consumption per cycle. If the same speed can be achieved using less energy per cycle by controlling such optimizations, the total energy consumption will be less. Some of these optimizations may be controlled by the compiler. Also, the switching energy from one instruction to another depends on the instruction order. So, in theory, if there are multiple instruction orders that give the same speed, the order that minimizes the switching energy will consume less overall energy. There is some academic research on this with simulation data, but I am not aware of any actual implementation in a production compiler that proves actual energy reduction. Has anyone ever implemented and experimented with such optimizations in LLVM? Thanks Ghassan Shobaki, PH.D Assistant Professor Department of Computer Science Princess Sumaya University for Technology Amman, Jordan ________________________________ From: Sean Silva <silvas at purdue.edu> To: Ghassan Shobaki <ghassan_shobaki at yahoo.com> Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu> Sent: Monday, April 15, 2013 5:03 PM Subject: Re: [LLVMdev] Power/Energy Awareness in LLVM See http://llvm.org/bugs/show_bug.cgi?id=6210. -- Sean Silva -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130415/0c0dc863/attachment.html>
On 15 Apr 2013, at 16:03, Sean Silva <silvas at purdue.edu> wrote:> See http://llvm.org/bugs/show_bug.cgi?id=6210.Chris is correct at the coarse granularity, but there are some trades to be made at the fine. There is some interesting work from MIT in the context of image processing kernels related to the relative costs of saving intermediates out to cache or DRAM vs recomputing them - often recomputing takes one to two orders of magnitude less power. The tile hashing mechanism in recent MALI GPUs is designed to address the same problem: accesses to memory - especially off-chip memory - use a surprisingly large amount of power. Optimising for this requires quite intimate knowledge of the target CPU (sizes of the caches, relative costs of ALU operations to cache / DRAM accesses, and so on), but it would be very interesting if a compiler had this knowledge and could take advantage of it. I don't know of any work using LLVM to do this (the MIT work was based on source-to-source transformations via a C++ DSL), but it would certainly be interesting to any company that shipped a large number of mobile devices based on a small number of distinct SoCs. If only there were such a company that regularly contributed to LLVM... David