Displaying 11 results from an estimated 11 matches for "sumaya".
2013 Nov 16
1
[LLVMdev] Publication: Combinatorial Preallocation Scheduling
...Optimization Approach
G. Shobaki, M. Shawabkeh and N. Abu-Rmaileh
ACM Transactions on Architecture and Code Optimization (TACO). vol. 10, issue 3, Article 14 (Sept. 2013)
http://dx.doi.org/10.1145/2512432
Regards
Ghassan Shobaki, PH.D
Assistant Professor
Department of Computer Science
Princess Sumaya University for Technology
g dot shobaki at psut dot edu dot jo
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2013 Apr 15
3
[LLVMdev] Power/Energy Awareness in LLVM
...on scheduling for low power (experimenting with different algorithms for minimizing switching power) and would like to find out if anyone in the LLVM community is interested in adding this feature to LLVM.
Regards
Ghassan Shobaki, PH.D
Assistant Professor
Department of Computer Science
Princess Sumaya University for Technology
Amman, Jordan
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2013 Jun 28
2
[LLVMdev] MI Scheduler vs SD Scheduler?
...is caused by a known regression in scheduling and/or allocation (which I doubt) or by the
implementation (or enabling) of some new optimization(s) that naturally
increase(s) register pressure?
Thank you in advance!
Ghassan Shobaki
Assistant Professor
Department of Computer Science
Princess Sumaya University for Technology
Amman, Jordan
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2013 Jul 01
0
[LLVMdev] MI Scheduler vs SD Scheduler?
...(s) that naturally increase(s) register pressure?
>
There is not a particular known regression. It's not surprising that optimizations increase pressure.
Andy
> Thank you in advance!
>
> Ghassan Shobaki
> Assistant Professor
> Department of Computer Science
> Princess Sumaya University for Technology
> Amman, Jordan
>
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2013 Jul 02
2
[LLVMdev] MI Scheduler vs SD Scheduler?
...n we test the MI scheduler by itself?
Is it interesting to test 3.3 or there are interesting features that were added to the trunk after branching 3.3? In the latter case, we are willing to test the trunk.
Thanks
Ghassan Shobaki
Assistant Professor
Department of Computer Science
Princess Sumaya University for Technology
Amman, Jordan
________________________________
From: Andrew Trick <atrick at apple.com>
To: Ghassan Shobaki <ghassan_shobaki at yahoo.com>
Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu>
Sent: Monday, July 1, 2013 8:10 PM
Subject:...
2013 Apr 15
0
[LLVMdev] Power/Energy Awareness in LLVM
See http://llvm.org/bugs/show_bug.cgi?id=6210.
-- Sean Silva
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2013 Apr 15
1
[LLVMdev] Power/Energy Awareness in LLVM
...simulation data, but I am not aware of any actual implementation in a
production compiler that proves actual energy reduction. Has anyone ever implemented and experimented with such optimizations in LLVM?
Thanks
Ghassan Shobaki, PH.D
Assistant Professor
Department of Computer Science
Princess Sumaya University for Technology
Amman, Jordan
________________________________
From: Sean Silva <silvas at purdue.edu>
To: Ghassan Shobaki <ghassan_shobaki at yahoo.com>
Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu>
Sent: Monday, April 15, 2013 5:03 PM
Subject...
2013 Jul 12
0
[LLVMdev] MI Scheduler vs SD Scheduler?
...n’t look like my June checkins made it into 3.3. If you’re enabling MI Sched, and actually evaluating performance of the default heuristics, then it’s best to use trunk.
-Andy
>
> Thanks
>
> Ghassan Shobaki
> Assistant Professor
> Department of Computer Science
> Princess Sumaya University for Technology
> Amman, Jordan
>
>
> From: Andrew Trick <atrick at apple.com>
> To: Ghassan Shobaki <ghassan_shobaki at yahoo.com>
> Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu>
> Sent: Monday, July 1, 2013 8:10 PM
> Subje...
2012 Sep 29
7
[LLVMdev] LLVM's Pre-allocation Scheduler Tested against a Branch-and-Bound Scheduler
...X in Cycle C+Delta. Otherwise, we will be
increasing the RP. Does the ILP scheduler ever make such a choice or it will
always schedule an instruction when the ready list is not empty?
Thank you in advance!
-Ghassan
Ghassan Shobaki
Assistant Professor
Department of Computer Science
Princess Sumaya University for Technology
Amman, Jordan
Attachments inlined:
Rough Latencies
Benchmark Branch-and-Bound LLVM
SPEC Score SPEC Score % Score Difference
400.perlbench 21.2 20.2 4.95%
401.bzip2 13.9 13.6 2.21%
403.gcc 19.5 19.8 -1.52%
429.mcf 20.5 20.5 0.00%
445.gobmk 18.6 18.6 0.00%
456....
2012 Sep 29
0
[LLVMdev] LLVM's Pre-allocation Scheduler Tested against a Branch-and-Bound Scheduler
...increasing the RP. Does the ILP scheduler
> ever make such a choice or it will always schedule an instruction when the ready
> list is not empty?
>
> Thank you in advance!
> -Ghassan
>
> Ghassan Shobaki
> Assistant Professor
> Department of Computer Science
> Princess Sumaya University for Technology
> Amman, Jordan
>
> Attachments inlined:
>
> Rough Latencies
>
> Benchmark Branch-and-Bound LLVM
>
> SPEC Score SPEC Score % Score Difference
> 400.perlbench 21.2 20.2 4.95%
> 401.bzip2 13.9 13.6 2.21%
> 403.gcc 19.5 19.8...
2012 Sep 29
0
[LLVMdev] LLVM's Pre-allocation Scheduler Tested against a Branch-and-Bound Scheduler
...he ILP scheduler ever make such a choice or it will always schedule an instruction when the ready list is not empty?
I don't believe so.
Evan
>
> Thank you in advance!
> -Ghassan
>
> Ghassan Shobaki
> Assistant Professor
> Department of Computer Science
> Princess Sumaya University for Technology
> Amman, Jordan
>
> Attachments inlined:
>
> Rough Latencies
>
> Benchmark Branch-and-Bound LLVM
>
> SPEC Score SPEC Score % Score Difference
> 400.perlbench 21.2 20.2 4.95%
> 401.bzip2 13.9 13.6 2.21%
> 403.gcc 19.5 19.8 -1.52%
>...