hi all I have a question about implementing a new instruction which does this function f(x) = x + ceilf (x) .x is a single float i have already added the instruction in my backend in the .td file def SUBCEIL_S : FFR<0x11, 0x3, 16, (outs FGR32:$fd), (ins FGR32:$fs), "frac.s\t$fd, $fs", [(set (f32 FGR32:$fd), (fadd (f32 FGR32:$fs ),(f32 (ceilf FGR32:$fs))))] >; it makes and install correctly but when i ll try to write code to use this instruction there is no luck. Should i do something in ISelLowering.cpp or ISelDAGToDAG.cpp file? my backend is based on mips backend thanks in Advance, Stavropoulos Nikos -- View this message in context: http://llvm.1065342.n5.nabble.com/LLVMdev-Instruction-Implementation-tp56359.html Sent from the LLVM - Dev mailing list archive at Nabble.com.
Hi,> def SUBCEIL_S : FFR<0x11, 0x3, 16, (outs FGR32:$fd), (ins FGR32:$fs), > "frac.s\t$fd, $fs", [(set (f32 FGR32:$fd), (fadd (f32 FGR32:$fs ),(f32 > (ceilf FGR32:$fs))))] >; > > it makes and install correctly but when i ll try to write code to use this > instruction there is no luck.More details (including the .ll source and *how* exactly things are going wrong) would be useful. Does llc crash? Does it simply not select your code even though there's an fceil in the DAG? Is there no fceil node in the DAG (run llc with "-view-isel-dags")? Assuming the "ceilf" is a typo, my wild stab in the dark would be that you've got code something like: define float @foo(float %in) { %1 = tail call float @ceilf(float %in) ret float %1 } declare float @ceilf(float) and haven't given the "@ceilf" function the attribute "readonly". This is what LLVM uses (in many cases) to decide whether the call is a known library call and can be transformed into an appropriate ISD node. Tim.
Hi and thanks for answering llc works fine just does not selecting my instruction i ve uploaded .ll file how can i include this attribute "readonly" so i can see if changes the generated assembly? my code is very simple int main (){ float d, d1 ; d= 12.3; d1 = d - ceilf(d); return 0; } -- View this message in context: http://llvm.1065342.n5.nabble.com/LLVMdev-Instruction-Implementation-tp56359p56377.html Sent from the LLVM - Dev mailing list archive at Nabble.com.