search for: dags

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2005 Dec 05
2
Re: [users] CentOS 4.2 dag repo problem.
Hello, It would be nice if we could get a full list of packages which have a wrong sha1 checksum. I don't have the bandwidth for a full mirror of all of Dag's rpms and i also don't have shell access to such a mirror. So a small request for a mirror admin: The following checks the files repodata/*.xml.gz against the sha1 sums in repomd.xml and checks the RPMS/*.rpm files against
2009 Dec 01
4
[LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit
Hello, I'm working in adding support for 64-bit integers to my target. I'm using LLVM to decompose the 64-bit integer operations by using 32-bit registers wherever possible and emulating support where not. When looking at the bit shift decomposition I saw what seems to be a bug in the implementation. The affected function is ExpandShiftWithUnknownAmountBit in LegalizeIntegerTypes.cpp.
2015 Dec 17
2
Deleting Public Mailbox?
Hi! What am I doing wrong here? Mission: Delete old empty sub mailboxes in our Public mailspace acl-file contents: MailingLists user=dag lrwstipekxa MailingLists/* user=dag lrwstipekxa Didn't work from my mail client so tried: Command tried: % doveadm mailbox delete -s MailingLists/Glibc -u dag doveadm(dag): Error: Can't delete mailbox MailingLists/Glibc: Permission
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...CurDAG->Combine(NoIllegalOperations, *AA, OptLevel); + } else { + CurDAG->Combine(NoIllegalOperations, *AA, OptLevel); + } + + DOUT << "Optimized vector-legalized selection DAG:\n"; + DEBUG(CurDAG->dump()); + } } if (ViewLegalizeDAGs) CurDAG->viewGraph("legalize input for " + BlockName);
2008 Sep 08
0
[LLVMdev] adde/addc
Richard Pennington wrote: > My target doesn't support 64 bit arithmetic, so I'd like to supply > definitions for adde/addc. The problem is I can't seem to figure out the > magic. Here's an example of what I need to generate: > > # two i64s in r5/r6 and r7/r8 > # result in r1/r2, carry in r3 > > # adde > add r2, r6, r8 > cmpltu r3, r2, r6 #
2009 Mar 30
2
[LLVMdev] RFC: X86InstrFormats.td Refactoring
There is some redundancy at the instruction format level in the x86 .td files. For example, in X86InstrFormats.td: // SSE1 Instruction Templates: // // SSI - SSE1 instructions with XS prefix. class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern> : I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>; // SSE3 Instruction
2018 May 25
2
[RFC] Formalizing FileCheck Features
...CHECK-NOT, the end of the DAG Group's search range is >> unaffected. > > Unaffected means that it's as if there's no following directive?  So > next CHECK-LABEL (possibly the implicit one at EOF)?  What if there's > a CHECK, CHECK-NEXT, or CHECK-SAME after all the DAGs and NOTs? If DAG doesn't have deferred execution then the end of the search range is the next (explicit or implicit) CHECK-LABEL point, end of story.   >>  After all DAG directives run, the >> match range for the entire DAG Group extends from the start of the >> earliest matc...
2005 Oct 23
5
dags repo after 4.2 update
Is anyone else having probs with dags repo after 4.2 update? # yum update Setting up Update Process Setting up repositories http://apt.sw.be/redhat/el4/en/i386/dag/repodata/repomd.xml: [Errno 4] IOError: <urlopen error (101, 'Network is unreachable')> Trying other mirror. Cannot open/read repomd.xml file for repository:...
2007 Sep 20
2
[LLVMdev] Building on x86-64
I made my first attempt to build on an x86_64-unknown-linux-gnu system. Is this supposed to work? I get libtools errors (below). The problem seems to be that it finds a 32-bit libltdl rather than the 64-bit libltdl. /home/dag> ls /usr/lib/libltdl.so.3.1.0 /usr/lib/libltdl.so.3.1.0 /home/dag> ls /usr/lib64/libltdl.so.3.1.0 /usr/lib64/libltdl.so.3.1.0 Is this a known problem?
2018 Apr 10
1
64 bit mask in x86vshuffle instruction
Please tell me whether the following implementation is correct..... My target supports 64 bit mask means immediate(0-2^63) I have implemented it but i dont know whether its correct or not. Please see the changes below that i have made in x86isellowering.cpp static SDValue lower2048BitVectorShuffle(const SDLoc &DL, ArrayRef<int> Mask, MVT VT,
2009 Dec 01
0
[LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit
On Mon, Nov 30, 2009 at 7:22 PM, Javier Martinez <javier at jmartinez.org> wrote: > Hello, > > I'm working in adding support for 64-bit integers to my target. I'm using > LLVM to decompose the 64-bit integer operations by using 32-bit registers > wherever possible and emulating support where not. When looking at the bit > shift decomposition I saw what seems to be a
2016 Mar 08
2
FileCheck: combining -DAG and -NOT
Nope. Sorry, your expectation is incorrect. "BETWEEN BEFORE AFTER" would be accepted, because: (1) the first –DAG matches BEFORE; (2) the –NOT range starts at the preceding match-point, i.e. the (end of the) BEFORE, thus does not find BETWEEN; (3) the second –DAG starts at the same point as the –NOT. That is, the first –DAG and the following –NOT *are* ordered; the –NOT and the
2016 Mar 08
2
FileCheck: combining -DAG and -NOT
If you look at the FileCheck documentation page: http://llvm.org/docs/CommandGuide/FileCheck.html you'll find this intriguing example of combining -DAG with -NOT (slightly amended to avoid some potential confusion): ; CHECK-DAG: BEFORE ; CHECK-NOT: BETWEEN ; CHECK-DAG: AFTER The page says this will reject the sequence "AFTER BEFORE", which is correct. It's intuitively obvious
2005 Nov 02
7
Dag repo
Hi All, Went to Dags page and did not see an entry or Centos for yum configuration. Is Dag ok to use for Centos? If so, how would I enter the info in my dag repo file? Phil
2018 Jun 14
3
[RFC] Formalizing FileCheck Features
A few replies, then I'll post a revised spec v2 which ought to incorporate all the other feedback. If I missed something, give a shout. Actually, I wish there were a way to do that [constrain DAG to a single line] for the sake of matching unordered text on a single line. SAME after DAGs is as close as I can get to that. Maybe we need a CHECK-DAG-SAME. Hmmm. You know, there were cases where people wrote tests that tried to use combo suffixes like that, but of course those directives were not actually executed (because they were treated like a SAME with prefix CHECK-DAG (or whatev...
2020 Oct 13
5
Manipulating DAGs in TableGen
...the DAG computes multiple values then return type of 'index'th result. > > 6. !setdagrestype(dag target_dag, type T [, index]) - Set return type of target_dag to T. Use of 'index' is as in 5.(Coupled with the existing (or enhanced?) foreach construct we can construct multiple DAGs with different return types.) > > .7 !setdagchild(dag target_dag, dag new_dag, index) - Set child 'index' numbered of target_dag to new_dag. I think this is more or less similar to 3 you suggested but I feel it is more convenient and concise. > > 8. !setdagchildcond(dag target_d...
2009 Mar 30
0
[LLVMdev] RFC: X86InstrFormats.td Refactoring
On Monday 30 March 2009 16:12, David Greene wrote: > There is some redundancy at the instruction format level in the x86 .td > files. For example, in X86InstrFormats.td: > > // SSE1 Instruction Templates: > // > // SSI - SSE1 instructions with XS prefix. > > class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> > pattern> > >
2020 Oct 11
2
Manipulating DAGs in TableGen
This is a proposal to enhance TableGen's ability to analyze and manipulate DAGs. Hopefully this will allows more complex DAGs to be built in TableGen. 1. Add a new value suffix. value(index) The value must be a DAG. The index specifies the operator or an operand, whose value is produced. The index can be 0 produce the operator 1...n produce...