llvm dev - Mar 2012 - [LLVMdev] VLIWPacketizerList: failing to schedule terminators

On Thu, Mar 29, 2012 at 01:50:58PM -0500, Sergei Larin
wrote:
> Tom, 
> 
>   What is in your isSchedulingBoundary? If it contains isLabel you might
> need to disable that assert:
> 
> assert(!MI->isTerminator() && !MI->isLabel() &&
>            "Cannot schedule terminators or labels!");
> 
> Sergei Larin
> 
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> 
> 
I haven't implemented it, so it's still the default implementation.
Though, the assertion failure is happening before the main packetizer
loop, so  it doesn't look like that function is ever called.

-Tom

> > -----Original Message-----
> > From: Tom Stellard [mailto:thomas.stellard at amd.com]
> > Sent: Thursday, March 29, 2012 11:01 AM
> > To: Anshuman Dasgupta; Sergei Larin
> > Cc: llvmdev at cs.uiuc.edu
> > Subject: VLIWPacketizerList: failing to schedule terminators
> > 
> > Hi,
> > 
> > I'm trying to use the VLIWPacketizerList to schedule instructions
for
> > the R600 target, and I'm running into this assertion failure:
> > ScheduleDAGInstrs.cpp:558: Cannot schedule terminators or labels!
> > 
> > I think I might not be using the VLIWPacketizerList class correctly.
> > I've attached my code to this email.  Can anyone spot what I'm
doing
> > wrong?
> > 
> > Also, I had to add a LiveIntervals * parameter to the constructor of
> > this class in order to do pre-RA scheduling.
> > 
> > 
> > Thanks,
> > Tom
> 
>

Tom,

   I do not have your call stack, but packetizer calls
ScheduleDAGInstrs::buildSchedGraph to create dependency model. If this is
the first time you use the new MI sched infrastructure (like your target has
not implemented misched yet) there might be some work needed to implement
couple target hooks. isSchedulingBoundary is one of them. Also try to
disable that assert and see what happens. It sounds strange, but in some
cases that assert is overly restrictive.

Andy, 

  Those are just my guesses, but the issue looks very similar to our first
experience with sched DAG constructor.

Sergei

--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.

> -----Original Message-----
> From: Tom Stellard [mailto:thomas.stellard at amd.com]
> Sent: Thursday, March 29, 2012 2:23 PM
> To: Sergei Larin
> Cc: 'Anshuman Dasgupta'; llvmdev at cs.uiuc.edu
> Subject: Re: VLIWPacketizerList: failing to schedule terminators
> 
> On Thu, Mar 29, 2012 at 01:50:58PM -0500, Sergei Larin wrote:
> > Tom,
> >
> >   What is in your isSchedulingBoundary? If it contains isLabel you
> might
> > need to disable that assert:
> >
> > assert(!MI->isTerminator() && !MI->isLabel() &&
> >            "Cannot schedule terminators or labels!");
> >
> > Sergei Larin
> >
> > --
> > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> >
> >
> 
> I haven't implemented it, so it's still the default implementation.
> Though, the assertion failure is happening before the main packetizer
> loop, so  it doesn't look like that function is ever called.
> 
> -Tom
> 
> 
> > > -----Original Message-----
> > > From: Tom Stellard [mailto:thomas.stellard at amd.com]
> > > Sent: Thursday, March 29, 2012 11:01 AM
> > > To: Anshuman Dasgupta; Sergei Larin
> > > Cc: llvmdev at cs.uiuc.edu
> > > Subject: VLIWPacketizerList: failing to schedule terminators
> > >
> > > Hi,
> > >
> > > I'm trying to use the VLIWPacketizerList to schedule
instructions
> for
> > > the R600 target, and I'm running into this assertion failure:
> > > ScheduleDAGInstrs.cpp:558: Cannot schedule terminators or labels!
> > >
> > > I think I might not be using the VLIWPacketizerList class
> correctly.
> > > I've attached my code to this email.  Can anyone spot what
I'm
> doing
> > > wrong?
> > >
> > > Also, I had to add a LiveIntervals * parameter to the constructor
> of
> > > this class in order to do pre-RA scheduling.
> > >
> > >
> > > Thanks,
> > > Tom
> >
> >

On Thu, Mar 29, 2012 at 02:57:27PM -0500, Sergei Larin
wrote:
> Tom,
> 
>    I do not have your call stack, but packetizer calls
> ScheduleDAGInstrs::buildSchedGraph to create dependency model. If this is
> the first time you use the new MI sched infrastructure (like your target
has
> not implemented misched yet) there might be some work needed to implement
> couple target hooks. isSchedulingBoundary is one of them. Also try to
> disable that assert and see what happens. It sounds strange, but in some
> cases that assert is overly restrictive.
Thanks, I disabled that assert, and I got a little farther.  I hit
some more assertion failures finalizeBundle, because the
instructions were still using virtual registers.  I'm not sure why
finalizeBundle doesn't currently handle virtual registers, maybe the
implementation isn't complete yet?

If I remove those asserts in finalizeBundle, I can get the program
to compile, and it has the VLIW bundles.

-Tom
> 
> Andy, 
> 
>   Those are just my guesses, but the issue looks very similar to our first
> experience with sched DAG constructor.
> 
> Sergei
> 
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
> 
> 
> > -----Original Message-----
> > From: Tom Stellard [mailto:thomas.stellard at amd.com]
> > Sent: Thursday, March 29, 2012 2:23 PM
> > To: Sergei Larin
> > Cc: 'Anshuman Dasgupta'; llvmdev at cs.uiuc.edu
> > Subject: Re: VLIWPacketizerList: failing to schedule terminators
> > 
> > On Thu, Mar 29, 2012 at 01:50:58PM -0500, Sergei Larin wrote:
> > > Tom,
> > >
> > >   What is in your isSchedulingBoundary? If it contains isLabel
you
> > might
> > > need to disable that assert:
> > >
> > > assert(!MI->isTerminator() && !MI->isLabel()
&&
> > >            "Cannot schedule terminators or labels!");
> > >
> > > Sergei Larin
> > >
> > > --
> > > Qualcomm Innovation Center, Inc. is a member of Code Aurora
Forum.
> > >
> > >
> > 
> > I haven't implemented it, so it's still the default
implementation.
> > Though, the assertion failure is happening before the main packetizer
> > loop, so  it doesn't look like that function is ever called.
> > 
> > -Tom
> > 
> > 
> > > > -----Original Message-----
> > > > From: Tom Stellard [mailto:thomas.stellard at amd.com]
> > > > Sent: Thursday, March 29, 2012 11:01 AM
> > > > To: Anshuman Dasgupta; Sergei Larin
> > > > Cc: llvmdev at cs.uiuc.edu
> > > > Subject: VLIWPacketizerList: failing to schedule terminators
> > > >
> > > > Hi,
> > > >
> > > > I'm trying to use the VLIWPacketizerList to schedule
instructions
> > for
> > > > the R600 target, and I'm running into this assertion
failure:
> > > > ScheduleDAGInstrs.cpp:558: Cannot schedule terminators or
labels!
> > > >
> > > > I think I might not be using the VLIWPacketizerList class
> > correctly.
> > > > I've attached my code to this email.  Can anyone spot
what I'm
> > doing
> > > > wrong?
> > > >
> > > > Also, I had to add a LiveIntervals * parameter to the
constructor
> > of
> > > > this class in order to do pre-RA scheduling.
> > > >
> > > >
> > > > Thanks,
> > > > Tom
> > >
> > >
> 
> 
>