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On Thu, Mar 29, 2012 at 01:50:58PM -0500, Sergei Larin wrote: > Tom, > > What is in your isSchedulingBoundary? If it contains isLabel you might > need to disable that assert: > > assert(!MI->isTerminator() && !MI->isLabel() && > "Cannot schedule terminators or labels!"); > > Se...

...sign for my target would be unwise until such discussion would take place. I also do not separate this process from bundle/packet representation. If you perceive an overhead associated with this activity, I could volunteer to help. Also, please see my comments embedded below. Thanks. Sergei Larin -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > -----Original Message----- > From: Andrew Trick [mailto:atrick at apple.com] > Sent: Tuesday, November 29, 2011 3:16 PM > To: Sergei Larin > Cc: 'Hal Finkel'; llvmdev at cs.uiuc.edu > Subject: Re: [...

...some value-add by using it? Thanks... Sergei --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: Eric Christopher [mailto:echristo at gmail.com] > Sent: Friday, June 13, 2014 4:32 PM > To: Sergei Larin > Cc: David Blaikie; LLVM Developers Mailing List > Subject: Re: [LLVMdev] Looking for a fix to memory leak in DWARF support > > On Fri, Jun 13, 2014 at 2:28 PM, Sergei Larin <slarin at codeaurora.org> wrote: > > > > Thanks Eric, > > > > > > They are...

Eli, We can probably think of something like that, but diff on assembly output is prone to false negatives and depends on the machine independent part of the compiler... Maybe someone can suggest more elegant way to verify the basic functionality? Thanks. Sergei Larin -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. -----Original Message----- From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Tuesday, November 01, 2011 2:12 PM To: Sergei Larin Cc: Tony Linthicum; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Contributing new back...

...s very similar to our first experience with sched DAG constructor. Sergei -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > -----Original Message----- > From: Tom Stellard [mailto:thomas.stellard at amd.com] > Sent: Thursday, March 29, 2012 2:23 PM > To: Sergei Larin > Cc: 'Anshuman Dasgupta'; llvmdev at cs.uiuc.edu > Subject: Re: VLIWPacketizerList: failing to schedule terminators > > On Thu, Mar 29, 2012 at 01:50:58PM -0500, Sergei Larin wrote: > > Tom, > > > > What is in your isSchedulingBoundary? If it contains isLab...

...w design will allow a target to compose a preRA scheduler from an MI-level framework combined with target-specific logic for selecting the optimal instruction order. I don't see any point in imposing a generic scheduling algorithm across all targets. -Andy On Nov 29, 2011, at 11:20 AM, Sergei Larin wrote: > > Andy, > > Is there any good info/docs on scheduling strategy in LLVM? As I was > complaining to you at the LLVM meeting, I end up reverse engineering/double > guessing more than I would like to... This thread shows that I am not > exactly alone in this... Thanks...

...ecution) st char R1 to A ld char from A+1 into R2 p2 = R2>255? (generate the predicate) p2 | R2 = 255 (conditional execution) store char R2 to A+1 The problem is that the compiler does not seem to know that the second ld can be scheduled before the first st. On 14 Nov 2011, at 16:50, Sergei Larin wrote: > I am working on something very(very) similar, what is the exact nature of > your question? > > Sergei Larin > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [m...

...ed (optimized). Rings a bell? Thanks. Sergei --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: Eric Christopher [mailto:echristo at gmail.com] > Sent: Friday, June 13, 2014 4:00 PM > To: Sergei Larin > Cc: David Blaikie; LLVM Developers Mailing List > Subject: Re: [LLVMdev] Looking for a fix to memory leak in DWARF support > > On Fri, Jun 13, 2014 at 11:03 AM, Sergei Larin <slarin at codeaurora.org> wrote: > > > > David, > > > > Thanks for the quick re...

...rminology is not as crisp as Andy's, but I think you can see what I mean. Sergei -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > -----Original Message----- > From: dag at cray.com [mailto:dag at cray.com] > Sent: Friday, May 11, 2012 12:14 PM > To: Sergei Larin > Cc: 'Andrew Trick'; 'Hal Finkel'; wrf at cray.com; 'LLVM Developers > Mailing List' > Subject: Re: [LLVMdev] Scheduler Roadmap > > Sergei Larin <slarin at codeaurora.org> writes: > > > - We do need to have a way to assign bundles much earl...

Jakob, Please see my comments below. Hope this helps. Sergei -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] Sent: Thursday, June 07, 2012 1:02 PM To: Sergei Larin Cc: 'Ivan Llopard'; 'LLVM Developers Mailing List' Subject: Re: [LLVMdev] Instruction bundles before RA: Rematerialization On Jun 7, 2012, at 10:25 AM, "Sergei Larin" <slarin at codeaurora.org> wrote: Generally as far as I concern, there is no way "g...

...due to the above described issue), so I cherish a hope to have both patches (to use AA and newer/updated scheduler) presented at the same time. What is your timeline? How much time you can afford until you must have this? Also, are you attending the LLVM meeting in San Jose this week? Sergei Larin -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. -----Original Message----- From: Bjorn De Sutter [mailto:bjorn.desutter at elis.ugent.be] Sent: Monday, November 14, 2011 10:18 AM To: Sergei Larin Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] alias analysis in ScheduleD...

Hi Sergei, Jakob, Thanks for your comments ! On 07/06/2012 20:41, Sergei Larin wrote: > > Jakob, > > Please see my comments below. Hope this helps. > > Sergei > > -- > > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > > *From:*Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] > *Sent:* Thursday, June 07, 2012 1:02...

Larin, Thank you for telling me about this. Our lab is planning to design a VLIW DSP and has to make a choice between GCC and LLVM, for which I take responsibility. As we all know that GCC's codes possess a long history and has a somewhat bad learning curve, I suggest choosing LLVM. It seems now t...

On Jun 7, 2012, at 10:25 AM, "Sergei Larin" <slarin at codeaurora.org> wrote: > Generally as far as I concern, there is no way “generic” (platform independent) code can add instructions to bundles optimally I agree, there are too many ways of modeling stuff with bundles. That is why I took the philosophical stance of treatin...

On Aug 9, 2012, at 10:09 AM, Sergei Larin <slarin at codeaurora.org> wrote: > Yang, > > This might not be such a tough choice on engineering side - one of the > LLVM differentiators is the ground-up, early introduced support for VLIW > specific features… Actually, LLVM lacked support for VLIW until fairly recently,...

...result in significant savings? Thanks. Sergei --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: David Blaikie [mailto:dblaikie at gmail.com] > Sent: Friday, June 13, 2014 12:41 PM > To: Sergei Larin > Cc: LLVM Developers Mailing List > Subject: Re: Looking for a fix to memory leak in DWARF support > > Are you sure it's a leak, not just a large memory footprint? > > A lot of things have changed. Heck, even the bugs that we've fixed might not > have existed two yea...

Hi Sergei. If an instruction conditionally writes R0 then I think it needs to implicitly use R0 for proper liveness Andy On Aug 9, 2012, at 9:48 AM, Sergei Larin <slarin at codeaurora.org> wrote: > > Hello everyone, > > Let me (re)present a question that might have previously been discussed, > but did not result in any code (AFIK). > > How do we represent a _conditional_ assignment (def) in a bundle MI? > > More cont...

Hi again! On 08/06/2012 17:11, Ivan Llopard wrote: > Hi Sergei, Jakob, > > Thanks for your comments ! > > On 07/06/2012 20:41, Sergei Larin wrote: >> >> Jakob, >> >> Please see my comments below. Hope this helps. >> >> Sergei >> >> -- >> >> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. >> >> *From:*Jakob Stoklund Olesen [mailto:stoklund at 2pi....

Sergei Larin <slarin at codeaurora.org> writes: > - We do need to have a way to assign bundles much earlier than we do now. Yeah, I can imagine why this would be useful. > And it needs to be intertwined with scheduling (Bundler currently reuses a > good chunk of scheduler infrastructure)....

...ssue - I would be happy to patch it. Sergei --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: Chris Lattner [mailto:clattner at apple.com] > Sent: Sunday, September 20, 2015 5:28 PM > To: Sergei Larin > Cc: llvm-dev at lists.llvm.org; Lang Hames > Subject: Re: GlobalOPT and sections > > On Sep 18, 2015, at 10:45 AM, Sergei Larin <slarin at codeaurora.org> wrote: > > What I do not see - the section information from the original GV is never > copied to the NewGV, so thi...