Hello, I noticed the following interesting code sequence while compiling a piece of code with the backend I'm developing. Probably this issue is for Jakob, but anyways this is what I'm getting: STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1) STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1) STDWPtrQRr <fi#13>, 0, %R23R22; mem:ST2[FixedStack13](align=1) STDWPtrQRr <fi#13>, 0, %R23R22; mem:ST2[FixedStack13](align=1) STDWPtrQRr <fi#14>, 0, %R21R20; mem:ST2[FixedStack14](align=1) STDWPtrQRr <fi#14>, 0, %R21R20; mem:ST2[FixedStack14](align=1) STDWPtrQRr <fi#15>, 0, %R19R18; mem:ST2[FixedStack15](align=1) STDWPtrQRr <fi#15>, 0, %R19R18; mem:ST2[FixedStack15](align=1) Each STDWPtrQRr is a spill instruction, but notice that it's spilling everything twice to each frame index. I'm only getting this with the Greedy regalloc, PBQP will not duplicate the spills. Is there something here that I'm missing or could it be a bug? I haven't attached the C code now to not spam the message or the huge debug output of the regalloc, but I will supply any information as requested. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120127/7e67ab91/attachment.html>
On Jan 27, 2012, at 10:20 AM, Borja Ferrer wrote:> Hello, > > I noticed the following interesting code sequence while compiling a piece of code with the backend I'm developing. Probably this issue is for Jakob, but anyways this is what I'm getting: > > STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1) > STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1) > STDWPtrQRr <fi#13>, 0, %R23R22; mem:ST2[FixedStack13](align=1) > STDWPtrQRr <fi#13>, 0, %R23R22; mem:ST2[FixedStack13](align=1) > STDWPtrQRr <fi#14>, 0, %R21R20; mem:ST2[FixedStack14](align=1) > STDWPtrQRr <fi#14>, 0, %R21R20; mem:ST2[FixedStack14](align=1) > STDWPtrQRr <fi#15>, 0, %R19R18; mem:ST2[FixedStack15](align=1) > STDWPtrQRr <fi#15>, 0, %R19R18; mem:ST2[FixedStack15](align=1) > > Each STDWPtrQRr is a spill instruction, but notice that it's spilling everything twice to each frame index. I'm only getting this with the Greedy regalloc, PBQP will not duplicate the spills. > Is there something here that I'm missing or could it be a bug? I haven't attached the C code now to not spam the message or the huge debug output of the regalloc, but I will supply any information as requested.Did you implement isStoreToStackSlot() ?
No, but after doing it that fixed it, thanks Jakob! 2012/1/27 Jakob Stoklund Olesen <stoklund at 2pi.dk>> > On Jan 27, 2012, at 10:20 AM, Borja Ferrer wrote: > > > Hello, > > > > I noticed the following interesting code sequence while compiling a > piece of code with the backend I'm developing. Probably this issue is for > Jakob, but anyways this is what I'm getting: > > > > STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1) > > STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1) > > STDWPtrQRr <fi#13>, 0, %R23R22; mem:ST2[FixedStack13](align=1) > > STDWPtrQRr <fi#13>, 0, %R23R22; mem:ST2[FixedStack13](align=1) > > STDWPtrQRr <fi#14>, 0, %R21R20; mem:ST2[FixedStack14](align=1) > > STDWPtrQRr <fi#14>, 0, %R21R20; mem:ST2[FixedStack14](align=1) > > STDWPtrQRr <fi#15>, 0, %R19R18; mem:ST2[FixedStack15](align=1) > > STDWPtrQRr <fi#15>, 0, %R19R18; mem:ST2[FixedStack15](align=1) > > > > Each STDWPtrQRr is a spill instruction, but notice that it's spilling > everything twice to each frame index. I'm only getting this with the Greedy > regalloc, PBQP will not duplicate the spills. > > Is there something here that I'm missing or could it be a bug? I haven't > attached the C code now to not spam the message or the huge debug output of > the regalloc, but I will supply any information as requested. > > Did you implement isStoreToStackSlot() ? > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120128/2e84ab61/attachment.html>