Hi Pavel,
> If you are interested in HDLs perhaps you would be interested in Vlang?
> I am currently working on Verilog fronted and I am looking for somebody
with
> VHDL interest to join the Vlang project.
I have never heard about the Vlang project but it seems to be an interesting
project. I think I
could be interested to join this project and do the VHDL front-end.
However, there are some points that you should be aware :
* I have never joined an open-source project before, so I am not very
experimented.
* I currently don't have a lot of free time.
* I know C, Ada, Python and a little of Java. I don't know C++ although I
can learn it if it is
required.
Cheers,
Jonas
