thr3ads.net - llvm dev - [LLVMdev] [LLVMDev] Add not instruction to PTX backend [May 2011]

If this information is useful, please help other people find it:
Share via:

陳韋任

2011-May-09 01:39 UTC

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

Hi, Justin
> We're been writing multiclasses for each unique type of instruction. 
The
> current PTX_LOGIC version is for 3-operand instructions.  A new multiclass
> needs to be created for 2-operand logic instructions.
  I am trying to add a multiclass for 2-operand logic instructions. For
example,

multiclass PTX_LOGIC_2OP<string opcstr, SDNode opnode> {
  def ripreds : InstPTX<(outs Preds:$d),
                     (ins Preds:$a),
                     !strconcat(opcstr, ".pred\t$d, $a"),
                     [(set Preds:$d, (opnode Preds:$a))]>;

  ...
}

  But the error is still the same. Where else should I look into?

  Thanks.

Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667

Dan Bailey

2011-May-09 10:18 UTC

head link

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
  <meta content="text/html;charset=UTF-8"
http-equiv="Content-Type">
</head>
<body bgcolor="#ffffff" text="#000000">
陳韋任 wrote:
<blockquote cite="mid:20110509013918.GA13760@cs.nctu.edu.tw"
type="cite">
  <pre wrap="">Hi, Justin

  </pre>
  <blockquote type="cite">
    <pre wrap="">We're been writing multiclasses for each
unique type of instruction.  The
current PTX_LOGIC version is for 3-operand instructions.  A new multiclass
needs to be created for 2-operand logic instructions.
    </pre>
  </blockquote>
  <pre wrap=""><!---->
  I am trying to add a multiclass for 2-operand logic instructions. For
example,

multiclass PTX_LOGIC_2OP<string opcstr, SDNode opnode> {
  def ripreds : InstPTX<(outs Preds:$d),
                     (ins Preds:$a),
                     !strconcat(opcstr, ".pred\t$d, $a"),
                     [(set Preds:$d, (opnode Preds:$a))]>;

  ...
}
  </pre>
</blockquote>
The error here is due to the fact that the 'not' dag is defined as a
pattern fragment rather than being an explicit dag node in itself.<br>
<br>
As a result, you'd need to define your multiclass as:<br>
<br>
multiclass PTX_LOGIC_20P<string opcstr, PatFrag opnode> { ... }<br>
<br>
This will correctly match the opnode, though it'll depend on the other
2-operand logic instructions whether this is how it should be done. If
you look at the definitions in include/Target/TargetSelectionDAG.td,
you'll see which instructions are defined as a PatFrag and which are
plain SDNodes.<br>
<br>
Dan<br>
<br>
<blockquote cite="mid:20110509013918.GA13760@cs.nctu.edu.tw"
type="cite">
  <pre wrap="">  But the error is still the same. Where else
should I look into?

  Thanks.

Regards,
chenwj

  </pre>
</blockquote>
</body>
</html>

陳韋任

2011-May-10 03:48 UTC

head link

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

> The error here is due to the fact that the 'not' dag is defined as
a
> pattern fragment rather than being an explicit dag node in itself.
> 
> As a result, you'd need to define your multiclass as:
>
> multiclass PTX_LOGIC_20P<string opcstr, PatFrag opnode> { ... }
>
> This will correctly match the opnode, though it'll depend on the other
> 2-operand logic instructions whether this is how it should be done. If
> you look at the definitions in include/Target/TargetSelectionDAG.td,
> you'll see which instructions are defined as a PatFrag and which are
> plain SDNodes.
>
>Dan
Thanks, Dan.

-- 
Wer-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667

陳韋任

2011-May-11 09:04 UTC

head link

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

Hi, Dan

  I add "not" instruction support in PTXInstrInfo.td as
you suggested before.

multiclass PTX_LOGIC_2OP<string opcstr,PatFrag opnode> {
  ...
}

  Now I am trying to write test case for logic and shift
operations. But I have a trouble in mapping LLVM IR to PTX
IR for "not" instruction. The test case I wrote is,

define ptx_device i16 @t4_u16(i16 %x) {
; CHECK: not.b16 rh0, rh1, rh2;
; CHECK-NEXT: ret;
  %z = xor i16 %x, 1
  ret i16 %z
}

Since LLVM IR doesn't support logical not directly, I use "xor i16 %x,
1"
to represent logical not in LLVM IR. It turns out the IR is mapped to
PTX "xor" not PTX "not". Any idea on how to get the mapping
correct?

  Thanks.

Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667

Apparently Analagous Threads

Search for more maybe matching threads

llvm dev - May 2011 - [LLVMdev] [LLVMDev] Add not instruction to PTX backend

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

[LLVMdev] [LLVMDev] Add not instruction to PTX backend

Apparently Analagous Threads