Thanks for your help with me about the way to access type and size of Value. But, I want also know the interface for me to access the type or size of virtual registers in the SSA form. 1. I find no way to associate the virtual registers with the Value class. 2. I also tried to get the size of register nReg by: TargetRegisterClass::getSize(), where the TargetRegisterClass object is obtained by MachineRegisterInfo::getRegClass( nReg ). But, I found it always returned with the value 4 bytes, say, GR32 (My target is the x86-32 bits). If all virtual registers were size of 32 bits, how could we consider the alias register file during register allocation? Namely, if a temporary value could be stored in 8 bits, why do we give it 32 bits? So, I doubt my second way to get the size of virtual register was wrong. Need your further help. 2011/1/28 John Criswell <criswell at illinois.edu>> On 1/27/11 3:23 AM, Qingan Li wrote: > >> Hi, >> >> I wonder if there is an interface for me to access the type or size of >> virtual registers in the SSA form? >> I have scanned the MachineOperand in CodeGen part, and failed to find this >> kind of info for virtual registers. >> > > The getType() method of Value * will return the LLVM type. The TargetData > class will provide information on size for a type on a particular hardware > platform. > > -- John T. > > >> -- >> Best regards, >> >> Li Qingan >> >> >-- Best regards, Li Qingan -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110128/3634ce43/attachment.html>
On 1/28/11 8:14 AM, Qingan Li wrote:> Thanks for your help with me about the way to access type and size of > Value. > But, I want also know the interface for me to access the type or size > of virtual registers in the SSA form. > 1. I find no way to associate the virtual registers with the Value class.In the in-memory LLVM IR, all of the SSA values are C++ objects derived from the Value class. For example, an Instruction object (class Instruction derives from class Value) *is* the SSA value generated by its result; they are one and the same.> 2. I also tried to get the size of register nReg by: > TargetRegisterClass::getSize(), where the TargetRegisterClass object > is obtained by MachineRegisterInfo::getRegClass( nReg ). > But, I found it always returned with the value 4 bytes, say, GR32 (My > target is the x86-32 bits). If all virtual registers were size of 32 > bits, how could we consider the alias register file during register > allocation? Namely, if a temporary value could be stored in 8 bits, > why do we give it 32 bits? So, I doubt my second way to get the size > of virtual register was wrong. Need your further help.I don't work much with LLVM's code generator infrastructure (I primarily do LLVM IR analysis and transforms), so I don't think I can answer your question. When working with pure LLVM IR, we use the TargetData class (http://llvm.org/doxygen/classllvm_1_1TargetData.html) to determine the size of various LLVM types. I'm not sure if it's what you want to use in the code generator. Someone else will have to help you with that. -- John T.> > 2011/1/28 John Criswell <criswell at illinois.edu > <mailto:criswell at illinois.edu>> > > On 1/27/11 3:23 AM, Qingan Li wrote: > > Hi, > > I wonder if there is an interface for me to access the type or > size of virtual registers in the SSA form? > I have scanned the MachineOperand in CodeGen part, and failed > to find this kind of info for virtual registers. > > > The getType() method of Value * will return the LLVM type. The > TargetData class will provide information on size for a type on a > particular hardware platform. > > -- John T. > > > -- > Best regards, > > Li Qingan > > > > > > -- > Best regards, > > Li Qingan >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110128/f704cb3f/attachment.html>
llvm::TargetRegisterClass::getSize() llvm::TargetRegisterClass::getAllignment() will return the size and alignment of a virtual register used both in register allocation and stack slot assignment. llvm::TargetRegisterClass::alloc_order_begin() llvm::TargetRegisterClass::alloc_order_end() will give a list of the possible physical registers. When a virtual register is assigned a physical register by v-reg map, that physical register should be in the target register class of the v-reg, and the aliases to that physical register can be found by llvm::TargetRegisterInfo::getAliasSet( physical-register ) The main classes to look at for register information is TargetRegisterClass TargetRegisterInfo MachineRegisterInfo Thanks, Jeff Kunkel On Fri, Jan 28, 2011 at 10:39 AM, John Criswell <criswell at illinois.edu>wrote:> On 1/28/11 8:14 AM, Qingan Li wrote: > > Thanks for your help with me about the way to access type and size of > Value. > But, I want also know the interface for me to access the type or size of > virtual registers in the SSA form. > 1. I find no way to associate the virtual registers with the Value class. > > > In the in-memory LLVM IR, all of the SSA values are C++ objects derived > from the Value class. For example, an Instruction object (class Instruction > derives from class Value) *is* the SSA value generated by its result; they > are one and the same. > > > 2. I also tried to get the size of register nReg by: > TargetRegisterClass::getSize(), where the TargetRegisterClass object is > obtained by MachineRegisterInfo::getRegClass( nReg ). > But, I found it always returned with the value 4 bytes, say, GR32 (My > target is the x86-32 bits). If all virtual registers were size of 32 bits, > how could we consider the alias register file during register allocation? > Namely, if a temporary value could be stored in 8 bits, why do we give it 32 > bits? So, I doubt my second way to get the size of virtual register was > wrong. Need your further help. > > > I don't work much with LLVM's code generator infrastructure (I primarily do > LLVM IR analysis and transforms), so I don't think I can answer your > question. > > When working with pure LLVM IR, we use the TargetData class ( > http://llvm.org/doxygen/classllvm_1_1TargetData.html) to determine the > size of various LLVM types. I'm not sure if it's what you want to use in > the code generator. Someone else will have to help you with that. > > -- John T. > > > > 2011/1/28 John Criswell <criswell at illinois.edu> > >> On 1/27/11 3:23 AM, Qingan Li wrote: >> >>> Hi, >>> >>> I wonder if there is an interface for me to access the type or size of >>> virtual registers in the SSA form? >>> I have scanned the MachineOperand in CodeGen part, and failed to find >>> this kind of info for virtual registers. >>> >> >> The getType() method of Value * will return the LLVM type. The >> TargetData class will provide information on size for a type on a particular >> hardware platform. >> >> -- John T. >> >> >>> -- >>> Best regards, >>> >>> Li Qingan >>> >>> >> > > > -- > Best regards, > > Li Qingan > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110129/b3c33bb2/attachment.html>