llvm dev - Jan 2011 - [LLVMdev] The type or size of virtual registers in machineinstr

Hi,

I want to know what is the type or size of a virtual register in a
Machineinstr::MachineOperand (If this MachineOperand is a register). For
example, what is the size of reg16385 in the following MachineInstr. I know
now in the llvm bitcode, the type of a Instruction could be obtained from
the Value::GetType(), but what is the counterpart in MachineInstr (not
derived from class Value)?

 %reg16385<def> = MOV32rm <fi#0>, 1, %reg0, 0, %reg0;
mem:LD4[%x_addr]
GR32:%reg16385

-- 
Best regards,

Li Qingan
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On Jan 28, 2011, at 6:34 PM, Qingan Li wrote:
> I want to know what is the type or size of a virtual register in a
Machineinstr::MachineOperand (If this MachineOperand is a register). For
example, what is the size of reg16385 in the following MachineInstr. I know now
in the llvm bitcode, the type of a Instruction could be obtained from the
Value::GetType(), but what is the counterpart in MachineInstr (not derived from
class Value)?
> 
>  %reg16385<def> = MOV32rm <fi#0>, 1, %reg0, 0, %reg0;
mem:LD4[%x_addr] GR32:%reg16385
There are no types in machine code, that is not tracked by the code generator.

The size of a register is not completely well defined (think of x87), but
TargetRegisterClass::getSize() will tell you the size of the spill slot that the
register allocator would use for the register.

/jakob

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