Hello!
We are experiencing a problem with jit generated instructions for arm
target (we have built llvm gcc for arm arch using the llvm sources
fetched from llvm svn a few days ago).
It triggers assert in MachineOperand::getImm method (isImm() &&
"Wrong
MachineOperand accessor") when the bitcode from the testcase (c code
below in this email) is being run. We have found out that we can
workaround this problem for now by setting "DisableJumpTables = true"
in llvm. Resulting llvm IR code looks fine though, so this is most
likely a problem in arm jit code generation.
code:
int buggy_fun(int* x) __attribute__((noinline));
int buggy_fun(int* x)
{
switch (*x) {
case 0: return *x + 123;
case 1: return *x + 456;
case 2: return *x + 789;
case 3: return *x + 901;
default: return 0;
}
}
int main()
{
int x = 2;
return buggy_fun(&x);
}
To reproduce the problem it should be compiled with -O1 optimization.
Thank you!
