llvm dev - Dec 2009 - [LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit

Hi Duncan,

I don't know if the optimization would help us much. Our architecture
performs integer shifts and subtractions at the same speed. I think the
optimization is limited to the case where NVBits is a power of two. That is
the case for all current value types but there's a separate thread where
someone is proposing adding i20 as a native type.

In your previous email you mentioned some comments added to check-in 90564.
In our architecture shifting by 0 doesn't cause any problems but the
comment might be valid for others.

Thanks,
Javier

On Fri, 04 Dec 2009 21:42:36 +0100, Duncan Sands <baldrick at free.fr>
wrote:
> PS: For a small optimization, in the case where Amt is bigger than 32
> (or whatever NVTBits is) you might want to use an "and" to mask
off
> the top bits of Amt rather than subtracting 32 (if Amt is 64 or greater
> then the result of the shift was undefined anyway, so it is ok to mask
> off all the upper bits).

Hi Javier,
> I don't know if the optimization would help us much. Our architecture
> performs integer shifts and subtractions at the same speed. I think the
> optimization is limited to the case where NVBits is a power of two.
it is irrelevant whether it is a power of two or not.  Anyway, since you
are the only user, and this is not helpful for you, I guess we can forget
it :)
> In your previous email you mentioned some comments added to check-in 90564.
> In our architecture shifting by 0 doesn't cause any problems but the
> comment might be valid for others.
Actually it's the shifting by 32 (if NVBits is 32) which is a problem.
If Amt is zero then a shift by 32 is generated at commented line.

Ciao,

Duncan.

Hi Duncan,

Maybe I'm beating a dead horse but I wanted to see if understood correctly
your optimization to avoid doing a subtraction.

The way I understand it the idea is to mask out the high bits of Amt which
in some cases is equivalent to subtracting a value from Amt. The cases
where this holds is when the value subtracted from Amt is a power of two.
This value is half the original register size. For 64-bit integers 32 is
subtracted from Amt which is equivalent to masking out the top 59 bits
leaving the bottom 5. For a 40-bit operation decomposed using two 20-bit
registers I don't know if a mask that can be ANDed to subtract 20 from Amt.

It's no biggie. I'm just curious as to why you thought that the register
size didn't matter. I's always good to learn something new :)

Thanks,
Javier

On Sat, 05 Dec 2009 08:30:59 +0100, Duncan Sands <baldrick at free.fr>
wrote:
> Hi Javier,
> 
>> I don't know if the optimization would help us much. Our
architecture
>> performs integer shifts and subtractions at the same speed. I think the
>> optimization is limited to the case where NVBits is a power of two.
> 
> it is irrelevant whether it is a power of two or not.  Anyway, since you
> are the only user, and this is not helpful for you, I guess we can forget
> it :)
> 
>> In your previous email you mentioned some comments added to check-in
>> 90564.
>> In our architecture shifting by 0 doesn't cause any problems but
the
>> comment might be valid for others.
> 
> Actually it's the shifting by 32 (if NVBits is 32) which is a problem.
> If Amt is zero then a shift by 32 is generated at commented line.
> 
> Ciao,
> 
> Duncan.