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Hi Duncan, I don't know if the optimization would help us much. Our architecture performs integer shifts and subtractions at the same speed. I think the optimization is limited to the case where NVBits is a power of two. That is the case for all current value types but there's a separate thread where someone is proposing adding i20 as a native type. In your previous email you mentioned some comments added to check-in 90564. In our architecture shifting by 0 doesn't cause any problems but...

Hi Javier, > I don't know if the optimization would help us much. Our architecture > performs integer shifts and subtractions at the same speed. I think the > optimization is limited to the case where NVBits is a power of two. it is irrelevant whether it is a power of two or not. Anyway, since you are the only user, and this is not helpful for you, I guess we can forget it :) > In your previous email you mentioned some comments added to check-in 90564. > In our architecture shifting by 0 doesn...

...8:30:59 +0100, Duncan Sands <baldrick at free.fr> wrote: > Hi Javier, > >> I don't know if the optimization would help us much. Our architecture >> performs integer shifts and subtractions at the same speed. I think the >> optimization is limited to the case where NVBits is a power of two. > > it is irrelevant whether it is a power of two or not. Anyway, since you > are the only user, and this is not helpful for you, I guess we can forget > it :) > >> In your previous email you mentioned some comments added to check-in >> 90564. >&g...

PS: For a small optimization, in the case where Amt is bigger than 32 (or whatever NVTBits is) you might want to use an "and" to mask off the top bits of Amt rather than subtracting 32 (if Amt is 64 or greater then the result of the shift was undefined anyway, so it is ok to mask off all the upper bits).

Duncan, Thanks for committing a fix. I see that you fixed a bug in my patch with the HiL in the case of an SRA. The issue with a test case is that it will depend on the target to expose it. Like you noted in the check-in comment x86 doesn't expose the bug. The target I'm working on isn't public. Short of writing a new one for the purpose of a test case I don't know what else to