llvm dev - Jul 2007 - [LLVMdev] Getting the target information of a branch instruction

Hello all,
I am new to the llvm infrastructure so if this question is already
resolved please redirect me to that link.

I am writing a pass for flow sensitive and context sensitive alias
analysis.for that i require the previous and next instruction of all the
instructions.Is there an intrinsic that can help me getting the
instruction numbers directly because i read at the llvm.org website making
changes to instruction class may be lead to unstableness..Also if i have a
branch instruction how do i get he target of the branch instruction.All i
could find was machine independent target code.

Please enlighten me on this topic asap...
Thanks in advance..

Cheers,
Abhinav

> On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote:
>> Hello all,
>> I am new to the llvm infrastructure so if this question is already
>> resolved please redirect me to that link.
>>
>> I am writing a pass for flow sensitive and context sensitive alias
>> analysis.for that i require the previous and next instruction of all
the
>> instructions.Is there an intrinsic that can help me getting the
>> instruction numbers directly because i read at the llvm.org website
>> making
>> changes to instruction class may be lead to unstableness..Also if i
have
>> a
>> branch instruction how do i get he target of the branch instruction.All
>> i
>> could find was machine independent target code.
>
> Is this in the code generator, or in the LLVM IR?   I assume that you mean
> the LLVM IR.  Given an unconditional branch, you can use
I->getOperand(0)
> to get the destination.  You should check out this document, it describes
> lots of interesting stuff:
> http://llvm.org/docs/ProgrammersManual.html
>
> in particular:
> http://llvm.org/docs/ProgrammersManual.html#common
>
> -Chris
>
> --
> http://nondot.org/sabre/
> http://llvm.org/
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
Thanks a lot for the information.Actually i am looking for the target of
conditional branch operation something like

some instruction INST...
if(condition)
{
}
else
{
}..

In this case the next set for the instruction INST will consist of the
code in the true condition as well as the falses condition....
for that i am checking if the opcode is terminator and after that i am
getting the opcode name and if it is a branch instruction then i should
get the statement number of the branch...i am using a map to associate an
instruction with number...i had a look at the IR and it has inserted
cond_true,cond_false and cond_next labels in the IR of the bytecode...

How do i go further with these values in hand?
please guide on this topic.
Thanks a lot.
abhinav.

On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote:
> Hello all,
> I am new to the llvm infrastructure so if this question is already
> resolved please redirect me to that link.
>
> I am writing a pass for flow sensitive and context sensitive alias
> analysis.for that i require the previous and next instruction of all the
> instructions.Is there an intrinsic that can help me getting the
> instruction numbers directly because i read at the llvm.org website making
> changes to instruction class may be lead to unstableness..Also if i have a
> branch instruction how do i get he target of the branch instruction.All i
> could find was machine independent target code.
Is this in the code generator, or in the LLVM IR?   I assume that you mean 
the LLVM IR.  Given an unconditional branch, you can use I->getOperand(0) 
to get the destination.  You should check out this document, it describes 
lots of interesting stuff:
http://llvm.org/docs/ProgrammersManual.html

in particular:
http://llvm.org/docs/ProgrammersManual.html#common

-Chris

-- 
http://nondot.org/sabre/
http://llvm.org/