Displaying 11 results from an estimated 11 matches for "cond_next".
2006 Nov 13
0
[LLVMdev] post-dominance frontier
On Thu, 9 Nov 2006, Ryan M. Lefever wrote:
Sorry I never responded to this:
> In the literature (see below for a reference), when a dominance frontier
> is computed, it is computed from a CFG that contains a dummy entry node
> and dummy exit node. Further, those dummy nodes are potential members
> of the (post-)dominance frontier for a given basic block. In LLVM, I
> could not
2006 Nov 10
2
[LLVMdev] post-dominance frontier
In the literature (see below for a reference), when a dominance frontier
is computed, it is computed from a CFG that contains a dummy entry node
and dummy exit node. Further, those dummy nodes are potential members
of the (post-)dominance frontier for a given basic block. In LLVM, I
could not figure out a way to determine if the dummy entry node is a
member of the post-dominance frontier of
2008 Jul 02
2
[LLVMdev] Problem while using mem2reg Optimization
...removed alloca of the corresponding pointers are just used in
load/stores.
I tried the following .ll file
*define i32 @test(i32 %y,i32 %z) {
entry:
%X = alloca i32 ; type of %X is i32*.
%X.0 = add i32 %y ,%z
store i32 %X.0, i32* %X ; Update X
br label %cond_next*
**
*cond_next:
%tmp1 = alloca i32
%tmp2 = sub i32 %y, 3
store i32 %tmp2,i32* %tmp1
ret i32 0
}*
**
I tried the Mem2Reg pass on above file and I got following output:
*; ModuleID = 'test4.bc'*
*define i32 @test(i32 %y, i32 %z) {
entry:
%X.0 = add i3...
2008 Jan 12
1
[LLVMdev] Labels
...i32* @yypos, align 4
%tmp10 = sub i32 %tmp8, %tmp9
%tmp11 = icmp slt i32 %tmp10, 512
br i1 %tmp11, label %bb, label %bb13
bb13:
%tmp15 = load %struct._IO_FILE** @stdin, align 4
%tmp16 = tail call i32 @_IO_getc( %struct._IO_FILE* %tmp15 )
%tmp21 = icmp eq i32 %tmp16, -1
br i1 %tmp21, label %cond_next, label %cond_true
cond_true:
%tmp24 = load i8** @yybuf, align 4
%tmp25 = load i32* @yypos, align 4
%tmp2627 = trunc i32 %tmp16 to i8
%tmp28 = getelementptr i8* %tmp24, i32 %tmp25
store i8 %tmp2627, i8* %tmp28, align 1
br label %cond_next
cond_next:
%iftmp.29.0 = phi i32 [ 1, %cond_true ],...
2007 Aug 02
0
[LLVMdev] Debug info for conditionally defined variables?
...cast
(%llvm.dbg.variable.type* @llvm.dbg.variable792014 to { }*) )
// Declares tm as tm
call void @llvm.dbg.declare( { }* %tm8, { }* bitcast
(%llvm.dbg.variable.type* @llvm.dbg.variable91 to { }*) )
...
cond_true:
%tmp15 = call %struct.tm* @localtime( i64* %curr )
br label %cond_next
cond_false:
%tmp16 = call %struct.tm* @gmtime( i64* %curr )
br label %cond_next
cond_next:
%storemerge = phi %struct.tm* [ %tmp15, %cond_true ], [ %tmp16,
%cond_false ]
store %struct.tm* %storemerge, %struct.tm** %iftmp.0
%tmp17 = load %struct.tm** %iftmp.0
store %struct.t...
2007 Jul 02
1
[LLVMdev] Getting the target information of a branch instruction
...am checking if the opcode is terminator and after that i am
getting the opcode name and if it is a branch instruction then i should
get the statement number of the branch...i am using a map to associate an
instruction with number...i had a look at the IR and it has inserted
cond_true,cond_false and cond_next labels in the IR of the bytecode...
How do i go further with these values in hand?
please guide on this topic.
Thanks a lot.
abhinav.
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
...dev/attachments/20070711/63f1e212/attachment.html>
-------------- next part --------------
llc -debug -print-machineinstrs -soft-float -disable-fp-elim -march=mips
sieve.bc -f -o llvm_sieve.s
MERGING MOSTLY EMPTY BLOCKS - BEFORE:
bb54: ; preds = %bb49
br label %bb55
bb55: ; preds = %bb54, %cond_next
%tmp56 = load i32* %NUM ; <i32> [#uses=1]
%tmp57 = sub i32 %tmp56, 1 ; <i32> [#uses=1]
store i32 %tmp57, i32* %NUM
%tmp58 = load i32* %NUM ; <i32> [#uses=1]
%tmp59 = icmp ne i32 %tmp58, -1 ; <i1> [#uses=1]
%tmp5960 = zext i1 %tmp59 to i8 ; <i8> [#uses=1]
%t...
2007 Jul 02
2
[LLVMdev] Getting the target information of a branch instruction
...he opcode is terminator and after that i am
>getting the opcode name and if it is a branch instruction then i should
>get the statement number of the branch...i am using a map to associate an
>instruction with number...i had a look at the IR and it has inserted
>cond_true,cond_false and cond_next labels in the IR of the bytecode...
>
>How do i go further with these values in hand?
>please guide on this topic.
>Thanks a lot.
>abhinav.
>_______________________________________________
>LLVM Developers mailing list
>LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu...
2007 Jul 02
0
[LLVMdev] Getting the target information of a branch instruction
...minator and after that i am
>>getting the opcode name and if it is a branch instruction then i should
>>get the statement number of the branch...i am using a map to associate an
>>instruction with number...i had a look at the IR and it has inserted
>>cond_true,cond_false and cond_next labels in the IR of the bytecode...
>>
>>How do i go further with these values in hand?
>>please guide on this topic.
>>Thanks a lot.
>>abhinav.
>>_______________________________________________
>>LLVM Developers mailing list
>>LLVMdev at cs.uiuc.edu...
2007 Jul 02
0
[LLVMdev] Getting the target information of a branch instruction
On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote:
> Hello all,
> I am new to the llvm infrastructure so if this question is already
> resolved please redirect me to that link.
>
> I am writing a pass for flow sensitive and context sensitive alias
> analysis.for that i require the previous and next instruction of all the
> instructions.Is there an intrinsic that can help me
2007 Jul 02
2
[LLVMdev] Getting the target information of a branch instruction
Hello all,
I am new to the llvm infrastructure so if this question is already
resolved please redirect me to that link.
I am writing a pass for flow sensitive and context sensitive alias
analysis.for that i require the previous and next instruction of all the
instructions.Is there an intrinsic that can help me getting the
instruction numbers directly because i read at the llvm.org website making