search for: abhi232

...9;if(I.isTerminator())' if a instruction 'I' is terminator. You can use 'if (isa<BranchInst>(I))' if a instruction 'I' is 'br' instruction. and so on... Thx, Seung Jae Lee ---- Original message ---- >Date: Mon, 2 Jul 2007 17:15:00 -0400 (EDT) >From: abhi232 at cc.gatech.edu >Subject: Re: [LLVMdev] Getting the target information of a branch instruction >To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > >> On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote: >>> Hello all, >>> I am new to th...

On 7/23/07, abhi232 at cc.gatech.edu <abhi232 at cc.gatech.edu> wrote: > Hi Bill, > Thanks a lot for your response.But my problem still remains.The thing is i > am having a data type std::vector<Value*> as i am checking for the > variables in Store Instructions and Malloc Instructions.For store...

...#39;I' is terminator. > You can use 'if (isa<BranchInst>(I))' if a instruction 'I' is 'br' > instruction. > and so on... > > Thx, > Seung Jae Lee > > ---- Original message ---- >>Date: Mon, 2 Jul 2007 17:15:00 -0400 (EDT) >>From: abhi232 at cc.gatech.edu >>Subject: Re: [LLVMdev] Getting the target information of a branch >> instruction >>To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> >> >>> On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote: >>>> Hello all, &g...

Hi Bill, Thanks a lot for your response.But my problem still remains.The thing is i am having a data type std::vector<Value*> as i am checking for the variables in Store Instructions and Malloc Instructions.For store the case is straightforward as discussed earlier.I want the same Value* variable for malloc inst as well. bcos i cannot have a different set for only instructions. can there be

...ed properly. So in order to generate that I am running make in the /runtime/libprofile. when I do that I get the following message. llvm[0]: Linking Release Lodable Module profile_rt.so llvm[0]: Compiling BasicBlockTracing.c for Release build (bytecode) make: *** No rule to make target `/net/hc287/abhi232/Desktop/LLVM/llvm-1.9/Release/bin/gccas', needed by `/net/hc287/abhi232/Desktop/LLVM/llvm-1.9/runtime/libprofile/Release/BasicBlockTracing.bc'. Stop. So I looked into the Makefile.common and then in Makefile.rules. Inside Makefile.rules I found that the ifndef GCCAS GCCAS := $(LLVMToo...

On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote: > Hello all, > I am new to the llvm infrastructure so if this question is already > resolved please redirect me to that link. > > I am writing a pass for flow sensitive and context sensitive alias > analysis.for that i require the previous and next instruct...

Hello all, I am new to the llvm infrastructure so if this question is already resolved please redirect me to that link. I am writing a pass for flow sensitive and context sensitive alias analysis.for that i require the previous and next instruction of all the instructions.Is there an intrinsic that can help me getting the instruction numbers directly because i read at the llvm.org website making

> On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote: >> Hello all, >> I am new to the llvm infrastructure so if this question is already >> resolved please redirect me to that link. >> >> I am writing a pass for flow sensitive and context sensitive alias >> analysis.for that i require the pr...

hello all, If i have an IR instruction of the form %tmp10 = call sbyte* %malloc( uint 4 ) ; <sbyte*> [#uses=1] %tmp10 = cast sbyte* %tmp10 to int* ; <int*> [#uses=1] store int* %tmp10, int** %t which is nothin but a malloc call how can i get %tmp into maybe a variable set. If i have a store instruction then it is pretty much simpler as the getOperand(1) can give