search for: cond_tru

Displaying 20 results from an estimated 31 matches for "cond_tru".

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2007 Jan 29
2
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
...n llvm on it (I am using a rather dated llvm 1.7, but I have the feeling this optimization is already there somewhere) I get the following llvm code : int %test() { entry: %mat = alloca [7 x [7 x [7 x int]]], align 16 ; <[7 x [7 x [7 x int]]]*> [#uses=2] br label %cond_true cond_true: ; preds = %bb31, %bb22, %cond_true, %entry %j.1.2.ph = phi int [ 0, %entry ], [ %j.1.2.ph, %cond_true ], [ %tmp24, %bb22 ], [ 0, %bb31 ] ; <int> [#uses=4] %i.0.0.ph = phi int [ 0, %entry ], [ %i.0.0.ph, %cond_true ], [ %i.0.0.ph, %bb22 ],...
2006 Nov 13
0
[LLVMdev] post-dominance frontier
On Thu, 9 Nov 2006, Ryan M. Lefever wrote: Sorry I never responded to this: > In the literature (see below for a reference), when a dominance frontier > is computed, it is computed from a CFG that contains a dummy entry node > and dummy exit node. Further, those dummy nodes are potential members > of the (post-)dominance frontier for a given basic block. In LLVM, I > could not
2006 Nov 10
2
[LLVMdev] post-dominance frontier
In the literature (see below for a reference), when a dominance frontier is computed, it is computed from a CFG that contains a dummy entry node and dummy exit node. Further, those dummy nodes are potential members of the (post-)dominance frontier for a given basic block. In LLVM, I could not figure out a way to determine if the dummy entry node is a member of the post-dominance frontier of
2008 Jan 12
1
[LLVMdev] Labels
...n 4 %tmp10 = sub i32 %tmp8, %tmp9 %tmp11 = icmp slt i32 %tmp10, 512 br i1 %tmp11, label %bb, label %bb13 bb13: %tmp15 = load %struct._IO_FILE** @stdin, align 4 %tmp16 = tail call i32 @_IO_getc( %struct._IO_FILE* %tmp15 ) %tmp21 = icmp eq i32 %tmp16, -1 br i1 %tmp21, label %cond_next, label %cond_true cond_true: %tmp24 = load i8** @yybuf, align 4 %tmp25 = load i32* @yypos, align 4 %tmp2627 = trunc i32 %tmp16 to i8 %tmp28 = getelementptr i8* %tmp24, i32 %tmp25 store i8 %tmp2627, i8* %tmp28, align 1 br label %cond_next cond_next: %iftmp.29.0 = phi i32 [ 1, %cond_true ], [ 0, %bb13 ] %tm...
2014 Mar 03
6
[Bug 2207] New: Potential NULL deference, found using coverity
...sh/142/src/crypto/openssh/authfile.c:224: cond_false: Condition "memcmp(cp, "-----BEGIN OPENSSH PRIVATE KEY-----\n", m1len)", taking false branch path:/c/amesh/142/src/crypto/openssh/authfile.c:227: if_end: End of if statement path:/c/amesh/142/src/crypto/openssh/authfile.c:230: cond_true: Condition "len", taking true branch path:/c/amesh/142/src/crypto/openssh/authfile.c:231: cond_true: Condition "*cp != 10", taking true branch path:/c/amesh/142/src/crypto/openssh/authfile.c:231: cond_true: Condition "*cp != 13", taking true branch path:/c/amesh/142/s...
2007 Nov 23
1
[LLVMdev] Will any pass change simple return branch into select/return pair?
Hi, Can any llvm pass change simple return branch into select/return pair? For example: define i10 @mod_N(i10 zeroext %a) zeroext { entry: %tmp2 = icmp ugt i10 %a, -400 ; <i1> [#uses=1] br i1 %tmp2, label %cond_true, label %return cond_true: ; preds = %entry %tmp5 = add i10 %a, 400 ; <i10> [#uses=1] ret i10 %tmp5 return: ; preds = %entry ret i10 %a } Changed into: define i10 @mod_N(i10 zeroext %a) zeroext { entry: %tmp2 = icmp ugt i10 %a, -400 ; <i1> [#uses...
2006 Apr 19
0
[LLVMdev] floating point exception and SSE2 instructions
...6 backend does generate scalar SSE2 instructions. For your example, it should emit something like: .text .align 4 .globl _sum_d _sum_d: subl $12, %esp movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $0, %eax jne LBB_sum_d_2 # cond_true.preheader LBB_sum_d_1: # entry.bb9_crit_edge pxor %xmm0, %xmm0 jmp LBB_sum_d_5 # bb9 LBB_sum_d_2: # cond_true.preheader pxor %xmm0, %xmm0 xorl %edx, %edx LBB_sum_d_3: # cond_true addsd (%ecx), %xmm0 addl $8, %ecx incl %edx...
2006 Oct 24
1
[LLVMdev] InsertBranch called unconditionally?
According to the docs, InsertBranch should only be called if AnalyzeBranch returns success. But in targets (like ARM or Sparc) that don't implement them, the following test fails: ----------------------------------- void %__gcov_init() { entry: switch uint 0, label %cond_true.i [ uint 0, label %UnifiedReturnBlock uint 875573313, label %gcov_version.exit ] cond_true.i: ; preds = %entry ret void gcov_version.exit: ; preds = %entry ret void UnifiedReturnBlock: ; preds = %entry...
2011 Aug 31
2
[LLVMdev] How to place call(s) to functions found in other llvm modules ???
..., i32 %y) { entry: %tmp = icmp eq i32 %x, %y br i1 %tmp, label %return, label %cond_false return: ; preds = %entry ret i32 %x cond_false: ; preds = %entry %tmp2 = icmp ult i32 %x, %y br i1 %tmp2, label %cond_true, label %cond_false1 cond_true: ; preds = %cond_false %tmp3 = sub i32 %y, %x %tmp4 = call i32 @gcd(i32 %x, i32 %tmp3) ret i32 %tmp4 cond_false1: ; preds = %cond_false %tmp5 = sub i32 %x, %y %tmp6 = call i32...
2006 Apr 19
2
[LLVMdev] floating point exception and SSE2 instructions
Hi, I'm building a little JIT that creates functions to do array manipulations, eg. sum all the elements of a double* array. I'm writing this in python, generating llvm assembly intructions and piping that through a call to ParseAssemblyString, ExecutionEngine, etc. It's working OK on integer values, but i'm getting nasty floating point exceptions when i try this on double*
2017 Feb 05
3
Adding Extended-SSA to LLVM
...ay want to have in the future will). > It's important to note: we sort phi node uses into the predecessor block they belong to, so that restriction does *not* apply to the typical phi node use case. IE given: define i32 @test12(i32 %x) { %cmp = icmp eq i32 %x, 0 br i1 %cmp, label %cond_true, label %cond_false cond_true: br label %ret cond_false: br label %ret ret: %res = phi i32 [ %x, %cond_true ], [ %x, %cond_false ] ret i32 %res } You will get: ; CHECK-LABEL: @test12( ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0 ; CHECK-NEXT: br i1 [[CMP]], lab...
2006 Dec 04
2
[LLVMdev] problem using scc_iterator on CallGraph
...---------------- ; ModuleID = 'bugpoint-reduced-simplified.bc' target datalayout = "e-p:32:32" target endian = little target pointersize = 32 target triple = "i686-pc-linux-gnu" implementation ; Functions: void %execute() { entry: br bool false, label %bb688, label %cond_true cond_true: ; preds = %entry ret void bb: ; preds = %bb688 switch int 0, label %bb684 [ int 33, label %bb412 int 35, label %bb604 int 37, label %bb531 int 38, label %bb418 int 42, label %bb495 int 43, label %bb467 int 45, label %cond_true484 int 47, label %bb510 int...
2007 Aug 24
2
[LLVMdev] llvmc doesn't work for compilation nor linking
...l global i1 false ; <i1*> [#uses=2] define void @foo2() { entry: store i1 true, i1* @i.b, align 1 ret void } declare void @foo4() define i32 @foo1() { entry: %tmp1.b = load i1* @i.b, align 1 ; <i1> [#uses=1] br i1 %tmp1.b, label %cond_true, label %return cond_true: ; preds = %entry call void @foo4( ) ret i32 52 return: ; preds = %entry ret i32 42 }
2006 Dec 04
0
[LLVMdev] problem using scc_iterator on CallGraph
...ced-simplified.bc' > target datalayout = "e-p:32:32" > target endian = little > target pointersize = 32 > target triple = "i686-pc-linux-gnu" > > implementation ; Functions: > > void %execute() { > entry: > br bool false, label %bb688, label %cond_true > > cond_true: ; preds = %entry > ret void > > bb: ; preds = %bb688 > switch int 0, label %bb684 [ > int 33, label %bb412 > int 35, label %bb604 > int 37, label %bb531 > int 38, label %bb418 > int 42, label %bb495 > int 43, label %bb467 &gt...
2007 Aug 02
0
[LLVMdev] Debug info for conditionally defined variables?
...es iftmp.0 as iftmp.0 call void @llvm.dbg.declare( { }* %iftmp.0, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable792014 to { }*) ) // Declares tm as tm call void @llvm.dbg.declare( { }* %tm8, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable91 to { }*) ) ... cond_true: %tmp15 = call %struct.tm* @localtime( i64* %curr ) br label %cond_next cond_false: %tmp16 = call %struct.tm* @gmtime( i64* %curr ) br label %cond_next cond_next: %storemerge = phi %struct.tm* [ %tmp15, %cond_true ], [ %tmp16, %cond_false ] store %struct.tm* %storemerge,...
2006 Dec 04
1
[LLVMdev] problem using scc_iterator on CallGraph
...arget datalayout = "e-p:32:32" >>target endian = little >>target pointersize = 32 >>target triple = "i686-pc-linux-gnu" >> >>implementation ; Functions: >> >>void %execute() { >>entry: >> br bool false, label %bb688, label %cond_true >> >>cond_true: ; preds = %entry >> ret void >> >>bb: ; preds = %bb688 >> switch int 0, label %bb684 [ >> int 33, label %bb412 >> int 35, label %bb604 >> int 37, label %bb531 >> int 38, label %bb418 >> int 42, label %bb4...
2007 Jul 02
1
[LLVMdev] Getting the target information of a branch instruction
...condition.... for that i am checking if the opcode is terminator and after that i am getting the opcode name and if it is a branch instruction then i should get the statement number of the branch...i am using a map to associate an instruction with number...i had a look at the IR and it has inserted cond_true,cond_false and cond_next labels in the IR of the bytecode... How do i go further with these values in hand? please guide on this topic. Thanks a lot. abhinav.
2010 Oct 20
0
[LLVMdev] llvm register reload/spilling around calls
On Oct 20, 2010, at 7:46 AM, Roland Scheidegger wrote: > On 20.10.2010 05:00, Jakob Stoklund Olesen wrote: >> Look in X86InstrControl.td. The call instructions are all prefixed >> by: >> >> let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, FP0, FP1, FP2, >> FP3, FP4, FP5, FP6, ST0, ST1, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, >> XMM0, XMM1, XMM2, XMM3,
2010 Oct 20
1
[LLVMdev] llvm register reload/spilling around calls
...---===// We should investigate an instruction sinking pass. Consider this silly example in pic mode: #include <assert.h> void foo(int x) { assert(x); //... } we compile this to: _foo: subl $28, %esp call "L1$pb" "L1$pb": popl %eax cmpl $0, 32(%esp) je LBB1_2 # cond_true LBB1_1: # return # ... addl $28, %esp ret LBB1_2: # cond_true ... The PIC base computation (call+popl) is only used on one path through the code, but is currently always computed in the entry block. It would be better to sink the picbase computation down into the block for the assertion, as i...
2007 Jul 02
2
[LLVMdev] Getting the target information of a branch instruction
...r that i am checking if the opcode is terminator and after that i am >getting the opcode name and if it is a branch instruction then i should >get the statement number of the branch...i am using a map to associate an >instruction with number...i had a look at the IR and it has inserted >cond_true,cond_false and cond_next labels in the IR of the bytecode... > >How do i go further with these values in hand? >please guide on this topic. >Thanks a lot. >abhinav. >_______________________________________________ >LLVM Developers mailing list >LLVMdev at cs.uiuc.edu...