llvm dev - Nov 2015 - Instructions with no operand

Hi all,

I am trying to implement an instruction with no operand for example
"clr"
in TableGen.

-----------------------------------------
e.g.

*InstrInfo.td:*

class TestInst<string opc, string asmstr, dag oops, dag iops,
                list<dag> pattern> : Instruction { ... }

def int_no_operand : Intrinsic<[]>;
class ALU<string opc> : TestInst<opc, "", (outs), (ins),
[(int_no_operand)]>;

*InstrFormat.td*
multiclass Clr {
 def _ : ALU<"clr">
   {let InstOp  = 0b11;}
}

-----------------------------------------

after compiling the code, I receive the following error:



*llvm-tblgen: /llvm/utils/TableGen/CodeGenInstruction.h:186:
std::pair<unsigned int, unsigned int>
llvm::CGIOperandList::getSubOperandNumber(unsigned int) const: Assertion `i
< OperandList.size() && "Invalid flat operand #"'
failed.*


How can I define an instruction with no operand?
In ARM there is a similar instruction like "CLREX" but I don't
understand
why in the assertion in CodeGenInstruction.h number of sub operand num
should be more than 0? getSubOperandNumber counts the operator (i.e. the
instruction mnemonic itself) as well? I mean, we will have minimum 1 in any
situation or it's just the number of operators?!

Cheers,
ES
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20151019/26d8de7d/attachment.html>

Guys, I stuck at this point. Could you please give me a hint how to solve
this problem without touching the LLVM backbone?!
Why LLVM doesn't let me define an instruction consisting of an operator
with no operand?

On Mon, Oct 19, 2015 at 5:04 PM, Sky Flyer <skylake007 at googlemail.com>
wrote:
> Hi all,
>
> I am trying to implement an instruction with no operand for example
"clr"
> in TableGen.
>
> -----------------------------------------
> e.g.
>
> *InstrInfo.td:*
>
> class TestInst<string opc, string asmstr, dag oops, dag iops,
>                 list<dag> pattern> : Instruction { ... }
>
> def int_no_operand : Intrinsic<[]>;
> class ALU<string opc> : TestInst<opc, "", (outs), (ins),
> [(int_no_operand)]>;
>
> *InstrFormat.td*
> multiclass Clr {
>  def _ : ALU<"clr">
>    {let InstOp  = 0b11;}
> }
>
> -----------------------------------------
>
> after compiling the code, I receive the following error:
>
>
>
> *llvm-tblgen: /llvm/utils/TableGen/CodeGenInstruction.h:186:
> std::pair<unsigned int, unsigned int>
> llvm::CGIOperandList::getSubOperandNumber(unsigned int) const: Assertion `i
> < OperandList.size() && "Invalid flat operand #"'
failed.*
>
>
> How can I define an instruction with no operand?
> In ARM there is a similar instruction like "CLREX" but I
don't understand
> why in the assertion in CodeGenInstruction.h number of sub operand num
> should be more than 0? getSubOperandNumber counts the operator (i.e. the
> instruction mnemonic itself) as well? I mean, we will have minimum 1 in any
> situation or it's just the number of operators?!
>
> Cheers,
> ES
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20151106/051643cd/attachment.html>

On 11/6/2015 11:35 AM, Sky Flyer via llvm-dev wrote:
> Guys, I stuck at this point. Could you please give me a hint how to
> solve this problem without touching the LLVM backbone?!
> Why LLVM doesn't let me define an instruction consisting of an operator
> with no operand?

Could you try it without the pattern?  I.e. just this:

      class TestInst<string opc, string asmstr, dag oops, dag iops,
                     list<dag> pattern> : Instruction { ... }

      class ALU<string opc> : TestInst<opc, "", (outs),
(ins)>;

See if you get the same error.  I suspect it has to do with the 
intrinsic itself, not the instruction definition.

-Krzysztof


-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
hosted by The Linux Foundation