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Reed Kotler

2013-Nov-28 17:29 UTC

[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors

I"m getting build errors I think from one of your patches O tjoml.

You need to have a build area that builds with clang and does warnings 
as errors to avoid these issues on putback.

here is my configure step for example:
  /home/rkotler/llvm_trunk/configure --enable-werror 
--prefix=/home/rkotler/ll
vm/install CC=/home/rkotler/llvm_3_2/install/bin/clang 
CXX=/home/rkotler/llvm_3_
2/install/bin/clang++


You should run debug and retail builds too because the warnings can 
become serious if there is something used in a DEBUG that is only 
referenced there.

llvm[3]: Compiling HexagonAsmPrinter.cpp for Debug+Asserts build
/home/rkotler/llvm_trunk/lib/Target/AArch64/AArch64ISelLowering.cpp:4244:22: 
error:
       comparison of integers of different signs: 'int' and
'unsigned int'
       [-Werror,-Wsign-compare]
         assert((Lane < 
V1.getOperand(0).getValueType().getVectorNumElements())
                 ~~~~ ^ 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/usr/include/assert.h:92:5: note: expanded from macro 'assert'
   ((expr)                                                               \
     ^
make[3]: Entering directory `/home/rkotler/llvm/build/lib/Target/R600'
1 error generated.
m

On 11/27/2013 05:07 PM, Hao Liu wrote:> Author: haoliu
> Date: Wed Nov 27 19:07:45 2013
> New Revision: 195903
>
> URL: http://llvm.org/viewvc/llvm-project?rev=195903&view=rev
> Log:
> AArch64: Fix a bug about disassembling post-index load single element to 4
vectors
>
> Modified:
>      llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>      llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>
> Modified:
llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
> URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp?rev=195903&r1=195902&r2=195903&view=diff
>
=============================================================================>
--- llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
(original)
> +++ llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp Wed
Nov 27 19:07:45 2013
> @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostI
>     case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: {
>       switch (Opc) {
>       case AArch64::LD4LN_WB_B_fixed: case AArch64::LD4LN_WB_B_register:
> -      TransferBytes = 3; break;
> +      TransferBytes = 4; break;
>       case AArch64::LD4LN_WB_H_fixed: case AArch64::LD4LN_WB_H_register:
> -      TransferBytes = 6; break;
> +      TransferBytes = 8; break;
>       case AArch64::LD4LN_WB_S_fixed: case AArch64::LD4LN_WB_S_register:
> -      TransferBytes = 12; break;
> +      TransferBytes = 16; break;
>       case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register:
> -      TransferBytes = 24; break;
> +      TransferBytes = 32; break;
>       }
>       IsLoad = true;
>       NumVecs = 4;
>
> Modified: llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
> URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt?rev=195903&r1=195902&r2=195903&view=diff
>
=============================================================================>
--- llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt Wed Nov
27 19:07:45 2013
> @@ -2129,7 +2129,8 @@
>   # CHECK: ld1 {v0.b}[9], [x0], #1
>   # CHECK: ld2 {v15.h, v16.h}[7], [x15], #4
>   # CHECK: ld3 {v31.s, v0.s, v1.s}[3], [sp], x3
> -# CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #24
> +# CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
> +# CHECK: ld4 {v0.h, v1.h, v2.h, v3.h}[7], [x0], x0
>   # CHECK: st1 {v0.d}[1], [x0], #8
>   # CHECK: st2 {v31.s, v0.s}[3], [sp], #8
>   # CHECK: st3 {v15.h, v16.h, v17.h}[7], [x15], #6
> @@ -2138,6 +2139,7 @@
>   0xef,0x59,0xff,0x4d
>   0xff,0xb3,0xc3,0x4d
>   0x00,0xa4,0xff,0x4d
> +0x00,0x78,0xe0,0x4d
>   0x00,0x84,0x9f,0x4d
>   0xff,0x93,0xbf,0x4d
>   0xef,0x79,0x9f,0x4d
>

NAKAMURA Takumi

2013-Nov-28 17:37 UTC

head link

[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors

It is r195843 and fixed in r195905, FYI.

2013/11/29 Reed Kotler <rkotler at mips.com>:> I"m getting build errors I think from one of your patches O tjoml.
>
> You need to have a build area that builds with clang and does warnings as
> errors to avoid these issues on putback.
>
> here is my configure step for example:
>  /home/rkotler/llvm_trunk/configure --enable-werror
> --prefix=/home/rkotler/ll
> vm/install CC=/home/rkotler/llvm_3_2/install/bin/clang
> CXX=/home/rkotler/llvm_3_
> 2/install/bin/clang++
>
>
> You should run debug and retail builds too because the warnings can become
> serious if there is something used in a DEBUG that is only referenced
there.
>
> llvm[3]: Compiling HexagonAsmPrinter.cpp for Debug+Asserts build
>
/home/rkotler/llvm_trunk/lib/Target/AArch64/AArch64ISelLowering.cpp:4244:22:
> error:
>       comparison of integers of different signs: 'int' and
'unsigned int'
>       [-Werror,-Wsign-compare]
>         assert((Lane <
> V1.getOperand(0).getValueType().getVectorNumElements())
>                 ~~~~ ^
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> /usr/include/assert.h:92:5: note: expanded from macro 'assert'
>   ((expr)                                                               \
>     ^
> make[3]: Entering directory `/home/rkotler/llvm/build/lib/Target/R600'
> 1 error generated.
> m
>
>
> On 11/27/2013 05:07 PM, Hao Liu wrote:
>>
>> Author: haoliu
>> Date: Wed Nov 27 19:07:45 2013
>> New Revision: 195903
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=195903&view=rev
>> Log:
>> AArch64: Fix a bug about disassembling post-index load single element
to 4
>> vectors
>>
>> Modified:
>>      llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>>      llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>>
>> Modified:
>> llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>> URL:
>>
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp?rev=195903&r1=195902&r2=195903&view=diff
>>
>>
=============================================================================>>
--- llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>> (original)
>> +++ llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Wed
>> Nov 27 19:07:45 2013
>> @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostI
>>     case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register:
{
>>       switch (Opc) {
>>       case AArch64::LD4LN_WB_B_fixed: case
AArch64::LD4LN_WB_B_register:
>> -      TransferBytes = 3; break;
>> +      TransferBytes = 4; break;
>>       case AArch64::LD4LN_WB_H_fixed: case
AArch64::LD4LN_WB_H_register:
>> -      TransferBytes = 6; break;
>> +      TransferBytes = 8; break;
>>       case AArch64::LD4LN_WB_S_fixed: case
AArch64::LD4LN_WB_S_register:
>> -      TransferBytes = 12; break;
>> +      TransferBytes = 16; break;
>>       case AArch64::LD4LN_WB_D_fixed: case
AArch64::LD4LN_WB_D_register:
>> -      TransferBytes = 24; break;
>> +      TransferBytes = 32; break;
>>       }
>>       IsLoad = true;
>>       NumVecs = 4;
>>
>> Modified: llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>> URL:
>>
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt?rev=195903&r1=195902&r2=195903&view=diff
>>
>>
=============================================================================>>
--- llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>> (original)
>> +++ llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt Wed
Nov
>> 27 19:07:45 2013
>> @@ -2129,7 +2129,8 @@
>>   # CHECK: ld1 {v0.b}[9], [x0], #1
>>   # CHECK: ld2 {v15.h, v16.h}[7], [x15], #4
>>   # CHECK: ld3 {v31.s, v0.s, v1.s}[3], [sp], x3
>> -# CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #24
>> +# CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
>> +# CHECK: ld4 {v0.h, v1.h, v2.h, v3.h}[7], [x0], x0
>>   # CHECK: st1 {v0.d}[1], [x0], #8
>>   # CHECK: st2 {v31.s, v0.s}[3], [sp], #8
>>   # CHECK: st3 {v15.h, v16.h, v17.h}[7], [x15], #6
>> @@ -2138,6 +2139,7 @@
>>   0xef,0x59,0xff,0x4d
>>   0xff,0xb3,0xc3,0x4d
>>   0x00,0xa4,0xff,0x4d
>> +0x00,0x78,0xe0,0x4d
>>   0x00,0x84,0x9f,0x4d
>>   0xff,0x93,0xbf,0x4d
>>   0xef,0x79,0x9f,0x4d
>>
>
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

reed kotler

2013-Nov-28 18:06 UTC

head link

[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors

I'm still seeing this problem.

On 11/28/2013 09:37 AM, NAKAMURA Takumi wrote:> It is r195843 and fixed in r195905, FYI.
>
> 2013/11/29 Reed Kotler <rkotler at mips.com>:
>> I"m getting build errors I think from one of your patches O tjoml.
>>
>> You need to have a build area that builds with clang and does warnings
as
>> errors to avoid these issues on putback.
>>
>> here is my configure step for example:
>>   /home/rkotler/llvm_trunk/configure --enable-werror
>> --prefix=/home/rkotler/ll
>> vm/install CC=/home/rkotler/llvm_3_2/install/bin/clang
>> CXX=/home/rkotler/llvm_3_
>> 2/install/bin/clang++
>>
>>
>> You should run debug and retail builds too because the warnings can
become
>> serious if there is something used in a DEBUG that is only referenced
there.
>>
>> llvm[3]: Compiling HexagonAsmPrinter.cpp for Debug+Asserts build
>>
/home/rkotler/llvm_trunk/lib/Target/AArch64/AArch64ISelLowering.cpp:4244:22:
>> error:
>>        comparison of integers of different signs: 'int' and
'unsigned int'
>>        [-Werror,-Wsign-compare]
>>          assert((Lane <
>> V1.getOperand(0).getValueType().getVectorNumElements())
>>                  ~~~~ ^
>> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> /usr/include/assert.h:92:5: note: expanded from macro 'assert'
>>    ((expr)                                                             
\
>>      ^
>> make[3]: Entering directory
`/home/rkotler/llvm/build/lib/Target/R600'
>> 1 error generated.
>> m
>>
>>
>> On 11/27/2013 05:07 PM, Hao Liu wrote:
>>> Author: haoliu
>>> Date: Wed Nov 27 19:07:45 2013
>>> New Revision: 195903
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=195903&view=rev
>>> Log:
>>> AArch64: Fix a bug about disassembling post-index load single
element to 4
>>> vectors
>>>
>>> Modified:
>>>      
llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>>>       llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>>>
>>> Modified:
>>> llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>>> URL:
>>>
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp?rev=195903&r1=195902&r2=195903&view=diff
>>>
>>>
=============================================================================>>>
--- llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
>>> (original)
>>> +++
llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp Wed
>>> Nov 27 19:07:45 2013
>>> @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostI
>>>      case AArch64::LD4LN_WB_D_fixed: case
AArch64::LD4LN_WB_D_register: {
>>>        switch (Opc) {
>>>        case AArch64::LD4LN_WB_B_fixed: case
AArch64::LD4LN_WB_B_register:
>>> -      TransferBytes = 3; break;
>>> +      TransferBytes = 4; break;
>>>        case AArch64::LD4LN_WB_H_fixed: case
AArch64::LD4LN_WB_H_register:
>>> -      TransferBytes = 6; break;
>>> +      TransferBytes = 8; break;
>>>        case AArch64::LD4LN_WB_S_fixed: case
AArch64::LD4LN_WB_S_register:
>>> -      TransferBytes = 12; break;
>>> +      TransferBytes = 16; break;
>>>        case AArch64::LD4LN_WB_D_fixed: case
AArch64::LD4LN_WB_D_register:
>>> -      TransferBytes = 24; break;
>>> +      TransferBytes = 32; break;
>>>        }
>>>        IsLoad = true;
>>>        NumVecs = 4;
>>>
>>> Modified:
llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>>> URL:
>>>
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt?rev=195903&r1=195902&r2=195903&view=diff
>>>
>>>
=============================================================================>>>
--- llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
>>> (original)
>>> +++ llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt
Wed Nov
>>> 27 19:07:45 2013
>>> @@ -2129,7 +2129,8 @@
>>>    # CHECK: ld1 {v0.b}[9], [x0], #1
>>>    # CHECK: ld2 {v15.h, v16.h}[7], [x15], #4
>>>    # CHECK: ld3 {v31.s, v0.s, v1.s}[3], [sp], x3
>>> -# CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #24
>>> +# CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
>>> +# CHECK: ld4 {v0.h, v1.h, v2.h, v3.h}[7], [x0], x0
>>>    # CHECK: st1 {v0.d}[1], [x0], #8
>>>    # CHECK: st2 {v31.s, v0.s}[3], [sp], #8
>>>    # CHECK: st3 {v15.h, v16.h, v17.h}[7], [x15], #6
>>> @@ -2138,6 +2139,7 @@
>>>    0xef,0x59,0xff,0x4d
>>>    0xff,0xb3,0xc3,0x4d
>>>    0x00,0xa4,0xff,0x4d
>>> +0x00,0x78,0xe0,0x4d
>>>    0x00,0x84,0x9f,0x4d
>>>    0xff,0x93,0xbf,0x4d
>>>    0xef,0x79,0x9f,0x4d
>>>
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

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