Displaying 3 results from an estimated 3 matches for "transferbytes".
2013 Nov 28
2
[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
...embler.cpp Wed Nov 27 19:07:45 2013
> @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostI
> case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: {
> switch (Opc) {
> case AArch64::LD4LN_WB_B_fixed: case AArch64::LD4LN_WB_B_register:
> - TransferBytes = 3; break;
> + TransferBytes = 4; break;
> case AArch64::LD4LN_WB_H_fixed: case AArch64::LD4LN_WB_H_register:
> - TransferBytes = 6; break;
> + TransferBytes = 8; break;
> case AArch64::LD4LN_WB_S_fixed: case AArch64::LD4LN_WB_S_register:
> - Trans...
2013 Nov 28
0
[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
...7 19:07:45 2013
>> @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostI
>> case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: {
>> switch (Opc) {
>> case AArch64::LD4LN_WB_B_fixed: case AArch64::LD4LN_WB_B_register:
>> - TransferBytes = 3; break;
>> + TransferBytes = 4; break;
>> case AArch64::LD4LN_WB_H_fixed: case AArch64::LD4LN_WB_H_register:
>> - TransferBytes = 6; break;
>> + TransferBytes = 8; break;
>> case AArch64::LD4LN_WB_S_fixed: case AArch64::LD4LN_WB_S_registe...
2013 Nov 28
1
[LLVMdev] [llvm] r195903 - AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
...;> @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostI
>>> case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: {
>>> switch (Opc) {
>>> case AArch64::LD4LN_WB_B_fixed: case AArch64::LD4LN_WB_B_register:
>>> - TransferBytes = 3; break;
>>> + TransferBytes = 4; break;
>>> case AArch64::LD4LN_WB_H_fixed: case AArch64::LD4LN_WB_H_register:
>>> - TransferBytes = 6; break;
>>> + TransferBytes = 8; break;
>>> case AArch64::LD4LN_WB_S_fixed: case AArch...