Hi,
With objdump, i have this (Intel syntax)
64 a1 00 00 00 00 mov eax,fs:0x0
However, if I pass above string to llvm-mc, I would have:
$ echo "0x64 0xa1 0x00 0x00 0x00 0x00"|./Release+Asserts/bin/llvm-mc
-disassemble -arch=x86 --output-asm-variant=1
.text
mov eax, dword ptr [0]
You can see a big difference. This is on the latest code. Any idea how to
fix this bug?
Thank you,
Jun
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Hi Jun,
I'm not sure how to fix this yet, but this looks incorrectly defined in
lib/Target/X86/X86InstrInfo.td:
def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src),
"mov{l}\t{$src, %eax|eax, $src}", [],
IIC_MOV_MEM>,
Requires<[In32BitMode]>;
This instruction can be REX-prefixed for a 64-bit move, and that also
doesn't appear to be defined anywhere.
I would file a bugzilla in the x86 component and cc Craig Topper, the x86
disasm/codegen expert.
On Wed, Nov 27, 2013 at 8:56 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
> Hi,
>
> With objdump, i have this (Intel syntax)
>
> 64 a1 00 00 00 00 mov eax,fs:0x0
>
>
> However, if I pass above string to llvm-mc, I would have:
>
> $ echo "0x64 0xa1 0x00 0x00 0x00
0x00"|./Release+Asserts/bin/llvm-mc
> -disassemble -arch=x86 --output-asm-variant=1
> .text
> mov eax, dword ptr [0]
>
>
> You can see a big difference. This is on the latest code. Any idea how to
> fix this bug?
>
> Thank you,
> Jun
>
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
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> I would file a bugzilla in the x86 component and cc Craig Topper, the x86 > disasm/codegen expert.If you chase down the revision history, there are already a couple of bugs filed: PR16961 and PR16962. Cheers. Tim.
On Thu, Nov 28, 2013 at 1:03 AM, Kay Tiong Khoo <kkhoo at perfwizard.com>wrote:> Hi Jun, > > I'm not sure how to fix this yet, but this looks incorrectly defined in > lib/Target/X86/X86InstrInfo.td: > > def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src), > "mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>, > Requires<[In32BitMode]>; > > This instruction can be REX-prefixed for a 64-bit move, and that also > doesn't appear to be defined anywhere. > > I would file a bugzilla in the x86 component and cc Craig Topper, the x86 > disasm/codegen expert. > > > > On Wed, Nov 27, 2013 at 8:56 AM, Jun Koi <junkoi2004 at gmail.com> wrote: > >> Hi, >> >> With objdump, i have this (Intel syntax) >> >> 64 a1 00 00 00 00 mov eax,fs:0x0 >> >> >> However, if I pass above string to llvm-mc, I would have: >> >> $ echo "0x64 0xa1 0x00 0x00 0x00 0x00"|./Release+Asserts/bin/llvm-mc >> -disassemble -arch=x86 --output-asm-variant=1 >> .text >> mov eax, dword ptr [0] >> >> >> You can see a big difference. This is on the latest code. Any idea how to >> fix this bug? >> >>Any plan to fix this bug? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140114/ae16b30e/attachment.html>