Displaying 2 results from an estimated 2 matches for "f5a9262f".
2013 Nov 27
0
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
...LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131127/f5a9262f/attachment.html>
2013 Nov 27
3
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
Hi,
With objdump, i have this (Intel syntax)
64 a1 00 00 00 00 mov eax,fs:0x0
However, if I pass above string to llvm-mc, I would have:
$ echo "0x64 0xa1 0x00 0x00 0x00 0x00"|./Release+Asserts/bin/llvm-mc
-disassemble -arch=x86 --output-asm-variant=1
.text
mov eax, dword ptr [0]
You can see a big difference. This is on the latest code. Any idea how to