llvm dev - Feb 2013 - [LLVMdev] implicit register usage

If I put in my tablegen td file that a certain instruction implicitly 
sets a register, do I need to also do the same if I am using BuildMI or 
can I assume that further passes and such will now know that this 
register is implicitly set or used?

Hi Reed,

The .td file "Defs = …" should be sufficient. The implicit uses and
implicit defs are part of the MCInstrDesc data structure, which is shared by all
instances of a given instruction.

-Jim

On Feb 17, 2013, at 2:22 PM, reed kotler <rkotler at mips.com> wrote:
> If I put in my tablegen td file that a certain instruction implicitly sets
a register, do I need to also do the same if I am using BuildMI or can I assume
that further passes and such will now know that this register is implicitly set
or used?
> 
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

Hi Jim,

One thing that seems strange to me is that if do a BuildMI, if you put a 
register inside the first parens, then it will treat it as a def, but if 
you just .addReg it won't (by default), even though it should know from 
the instruction definition.

Seems like it should do that.

Why would you want it to not do that?

Reed



On 02/18/2013 01:22 PM, Jim Grosbach wrote:
> Hi Reed,
>
> The .td file "Defs = …" should be sufficient. The implicit uses
and implicit defs are part of the MCInstrDesc data structure, which is shared by
all instances of a given instruction.
>
> -Jim
>
> On Feb 17, 2013, at 2:22 PM, reed kotler <rkotler at mips.com> wrote:
>
>> If I put in my tablegen td file that a certain instruction implicitly
sets a register, do I need to also do the same if I am using BuildMI or can I
assume that further passes and such will now know that this register is
implicitly set or used?
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev