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On 03/19/2015 09:57 AM, David Blaikie wrote: > > > On Thu, Mar 19, 2015 at 9:52 AM, Reed Kotler <reed.kotler at imgtec.com > <mailto:reed.kotler at imgtec.com>> wrote: > > On 03/19/2015 09:38 AM, David Blaikie wrote: >> >> >> On Thu, Mar 19, 2015 at 9:34 AM, Reed Kotler >> <reed.kotler at imgtec.com <mailto:reed.kotler at...

On 06/10/2014 05:51 PM, Pete Cooper wrote: > Hi Reed > > You can do this on the instruction itself by telling it 2 operands > must be the same register. For example, from X86: > > let Constraints = "$src1 = $dst" in > defm INSERTPS : SS41I_insertf32<0x21, "insertps">; > > Thanks, Hi Pete, Sorry....

On 03/19/2015 09:38 AM, David Blaikie wrote: > > > On Thu, Mar 19, 2015 at 9:34 AM, Reed Kotler <reed.kotler at imgtec.com > <mailto:reed.kotler at imgtec.com>> wrote: > > On 03/19/2015 09:24 AM, David Blaikie wrote: >> >> >> On Thu, Mar 19, 2015 at 9:18 AM, Reed Kotler >> <reed.kotler at imgtec.com <mailto:reed.kotler at...

On 03/19/2015 09:24 AM, David Blaikie wrote: > > > On Thu, Mar 19, 2015 at 9:18 AM, Reed Kotler <reed.kotler at imgtec.com > <mailto:reed.kotler at imgtec.com>> wrote: > > Well, you are an mclinker contributor > > > Me personally? Not that I know of. Sorry. I thought i had seen your name in an mclinker commit. > > and Google uses mclinker &g...

...from those classes. I can't understand your reasoning as to why these classes must be final. I was kind of surprised that there are no mclinker build bots that would have picked this up right away. On 03/19/2015 09:08 AM, David Blaikie wrote: > > > On Thu, Mar 19, 2015 at 9:05 AM, Reed Kotler <reed.kotler at imgtec.com > <mailto:reed.kotler at imgtec.com>> wrote: > > On 03/19/2015 08:55 AM, David Blaikie wrote: >> >> >> On Thu, Mar 19, 2015 at 4:30 AM, Reed Kotler >> <Reed.Kotler at imgtec.com <mailto:Reed.Kotler at...

If you can't make an executable test from C or C++ code then how do you know something works. Just by examination of the .s? On 09/30/2014 03:18 PM, Reed Kotler wrote: > If I wanted to call this function that they generated by hand, from C or > C+ code, how would that be done? > > if have seen cases where a real boolean gets generated but it was > something fairly involved. > > is a boolean and a char supposed to occupy the same...

...back makes the compilation slower. I'm wondering what could be done to remove this restriction about fast-isel not being able to handle non legal types. ________________________________________ From: Anton Korobeynikov [anton at korobeynikov.info] Sent: Sunday, August 31, 2014 12:55 AM To: Reed Kotler Cc: LLVMdev at cs.uiuc.edu Subject: Re: [LLVMdev] lowering and non legal types in fast-isel Fastisel should fallback to usual selector in the cases it cannot handle. So, for illegal types as well. On Sun, Aug 31, 2014 at 1:42 AM, reed kotler <rkotler at mips.com> wrote: > Fast-ise...

...ll phone call. The GSM codec is worst (unusable), G711u and G711a are best but not good enough to use. I don't think it's a lack of bandwidth. What tuning options or approaches should I be investigating to make this work. Also, what's the best soft phone(s) for Windows XP? thanks, -reed

Well, differences of opinion is what makes horse races. Reed On 06/04/2012 04:57 PM, Daniel Berlin wrote: > On Mon, Jun 4, 2012 at 7:53 PM, reed kotler<rkotler at mips.com> wrote: >> On 06/04/2012 03:25 PM, Daniel Berlin wrote: >>> I'm pretty sure neither llvm nor clang have any technical debt at all. >>> >>> O...

...hat. On Wed, Jul 27, 2016 at 3:45 PM, Marcus Fonzarelli < marcus.fonzarelli at yandex.com> wrote: > So I guess you're the bully of the community here. Strong opinions without > understanding, talk shit, and nothing useful to contribute. > > > 27.07.2016, 21:54, "Tony Reed" <anthony.reed at gmail.com>: > > I would rather the maintainers would spend their time improving the > application, and not worrying aobut the OP's hurt little open-sourced > religious feelings. I use rsync to transfer pretty massive (wait for it) > ADOBE PHOTOSHOP fi...

...the A9 schedule as an example: http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td The documentation could use more clarity, but this is how I was able to do it to always get two specific instructions to be scheduled together. ________________________________________ From: reed kotler [rkotler at mips.com] Sent: Tuesday, September 17, 2013 8:54 PM To: Micah Villmow Cc: Owen Anderson; llvmdev Mailing List Subject: Re: [LLVMdev] forcing two instructions to be together On 09/17/2013 04:51 PM, Micah Villmow wrote: > Reed, > Couldn't you also use instruction sched...

...mPrinter be protected void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; I have some stubs that I want to emit in MipsAsmParser . Are there any objections to doing this? Reed

Is there a simple way to add a comment in the machine instructions of a basic block? Ideally something that can be used with machine instruction builder. Tia. Reed

...lid Unknown error: 0 when I try to connect to oberon. This same connection works fine on another machine with MIT krb5. Interestingly the tickets are issued even though the authentication fails: [0:49] alex@Laptop: ~> klist Credentials cache: FILE:/tmp/krb5cc_1001 Principal: boterola@REED.EDU Issued Expires Principal Feb 13 00:22:56 Feb 13 07:02:46 krbtgt/REED.EDU@REED.EDU Feb 13 00:38:54 Feb 13 07:02:46 host/oberon.reed.edu@REED.EDU I am also able to use GSSAPI in thunderbird (linux version with MIT krb5 libraries). Does anyone ha...

Is there a simple way to just change the opcode of a machine instruction. I have a lot of long/short pairs where when I know the offset, i can replace the long version with the short version. Tia. REed

On 03/19/2015 08:55 AM, David Blaikie wrote: > > > On Thu, Mar 19, 2015 at 4:30 AM, Reed Kotler <Reed.Kotler at imgtec.com > <mailto:Reed.Kotler at imgtec.com>> wrote: > > One could argue that mclinker is doing something good or not by > how it's using this class > but I don't see the need for parser<bool> to be final. That is a &gt...

Reed, Couldn't you also use instruction scheduling classes and specify that the second instruction has a bypass from the first instruction? The scheduler should always schedule them together in that case. Micah > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvm...

On 02/24/2014 04:42 PM, Eric Christopher wrote: > On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote: >> I need to leave soon and will take a look in the morning. >> >> I did look at the autoconf input files configure.ac >> >> There is a disable-zlib but not a disable-valgrind, even though it seems >> like there used to b...

Okay. Cool. So do you bootrstrap and verify as part of the usual testing? Do the nightly scripts do this? Reed On 06/28/2012 11:08 AM, Eric Christopher wrote: > On Jun 27, 2012, at 10:48 PM, Reed Kotler<rkotler at mips.com> wrote: > >> On 06/27/2012 05:00 PM, Eric Christopher wrote: >>> On Jun 19, 2012, at 5:24 PM, reed kotler<rkotler at mips.com> wrote: >>> &gt...

Reed, On Oct 20, 2011, at 9:47 AM, Reed Kotler wrote: > I would like to see the many adhoc parsers in LLVM get replaced by ones > generated from grammars. FYI, this is very unlikely to happen. The parsers in LLVM were historically generated from grammars (bison, as I recall), and those implem...