llvm dev - Sep 2007 - [LLVMdev] Dynamically alternating between register allocators

Hey all,

     is there a simple way to alternate between different register 
allocators at run time? I would like to decide dynamically which register 
allocator to use. The decision is based on information that is produced by 
a pass that executes before register allocation takes place.

Is it possible to modify RegisterRegAlloc::Registry to take into 
consideration this information? Is there any similar example in LLVM?

all the best,

Fernando

Hi Fernando,

To do this you would need to change the register allocation pass on  
the fly. I don't think this is currently possible. Someone please  
correct me if I am wrong.

I would like to see hierarchical pass capability built into pass  
manager. This allows us to group live variables, phi lowering, two- 
address, lower subreg, live interval analysis, coalescing, allocation,  
and spilling into a single register allocator pass. The register  
allocator pass is then responsible for controlling its own sub-passes  
(not just the order of passes, but also termination conditions).  
Similarly, branch folding and if-conversion should be lumped together  
into a cfg optimization pass. Devang, hint hint. :-)

Evan

On Sep 5, 2007, at 9:36 AM, Fernando Magno Quintao Pereira wrote:
>
> Hey all,
>
>     is there a simple way to alternate between different register
> allocators at run time? I would like to decide dynamically which  
> register
> allocator to use. The decision is based on information that is  
> produced by
> a pass that executes before register allocation takes place.
>
> Is it possible to modify RegisterRegAlloc::Registry to take into
> consideration this information? Is there any similar example in LLVM?
>
> all the best,
>
> Fernando
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

On Sep 5, 2007, at 2:32 PM, Evan Cheng wrote:
> I would like to see hierarchical pass capability built into pass
> manager. This allows us to group live variables, phi lowering, two-
> address, lower subreg, live interval analysis, coalescing, allocation,
> and spilling into a single register allocator pass. The register
> allocator pass is then responsible for controlling its own sub-passes
> (not just the order of passes, but also termination conditions).
> Similarly, branch folding and if-conversion should be lumped together
> into a cfg optimization pass. Devang, hint hint. :-)
We already have pass hierarchy, each pass manger is itself a full  
fledged pass. For example, when you insert a loop pass manger in a  
pass queue, you're inserting a function pass which responds to  
runOnFunction().

However, it seems you want dynamic pass queue manager.  In loop  
optimizer, a pass can request reprocessing of a given loop by re- 
inserting loop into the queue. However this loop is reprocessed by all  
loop pass not just by few selected ones. One alternative way to  
achieve this is to create RAPassManager to group all these RA passes  
together. Yet another approach would be to keep track of followup  
passes but that would required significant modifications in PM because  
followup passes may require something that may not available and so  
on...

-
Devang

This doesn't necessarily need to be in the passmanager, but I'd like  
to see the code generator grow the ability to codegen an entire  
function multiple times.  Ideally, we'd be able to codegen all the way  
to final machineinstrs in multiple configurations and then pick the  
best based on some metric.  This would allow lots of interesting  
experiments and allow people willing to wait for really good code to  
get it.  Once the "best" codegen for a function is done, the final  
machineinstrs would be sent to the asmprinter or code emitter.

It isn't clear to me how to best fit this into the passmanager model  
though.

-Chris

http://nondot.org/sabre
http://llvm.org

On Sep 5, 2007, at 2:32 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> Hi Fernando,
>
> To do this you would need to change the register allocation pass on
> the fly. I don't think this is currently possible. Someone please
> correct me if I am wrong.
>
> I would like to see hierarchical pass capability built into pass
> manager. This allows us to group live variables, phi lowering, two-
> address, lower subreg, live interval analysis, coalescing, allocation,
> and spilling into a single register allocator pass. The register
> allocator pass is then responsible for controlling its own sub-passes
> (not just the order of passes, but also termination conditions).
> Similarly, branch folding and if-conversion should be lumped together
> into a cfg optimization pass. Devang, hint hint. :-)
>
> Evan
>
> On Sep 5, 2007, at 9:36 AM, Fernando Magno Quintao Pereira wrote:
>
>>
>> Hey all,
>>
>>    is there a simple way to alternate between different register
>> allocators at run time? I would like to decide dynamically which
>> register
>> allocator to use. The decision is based on information that is
>> produced by
>> a pass that executes before register allocation takes place.
>>
>> Is it possible to modify RegisterRegAlloc::Registry to take into
>> consideration this information? Is there any similar example in LLVM?
>>
>> all the best,
>>
>> Fernando
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev