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2007 Nov 23
2
[LLVMdev] global register allocation.
On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Hi, Sanjiv, > > those passes operate on the whole machine function. Each machine > function contains many basic blocks. If a program has many functions, the > register allocator will be called as many times, i.e it does n...
2007 Nov 25
1
[LLVMdev] global register allocation.
...information between regalloc passes for different functions may not be enough for my case. I will need to maintain the regalloc info of various passes in the call graph order. Anyways thanks for your inputs. I will get back if I need to learn more. Sanjiv On Nov 23, 2007 11:29 PM, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > Hi, again, > > I think you can do it in the same way that the other allocators have > been coded, i.e extend RA, register the pass and so forth. I am not sure > about the best way to pass information among a run of RegAlloc to...
2020 Feb 22
3
The AnghaBench collection of compilable programs
...the code is published. That may be a problem for some users. > > Have you thought about integrating the benchmarks as external tests into LLVM’s test-suite? That would make it very easy to play around with. > > Cheers, > Florian > > > On 22 Feb 2020, at 14:56, Fernando Magno Quintao Pereira via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > Dear LLVMers, > > > > we, at UFMG, have been building a large collection of compilable > > benchmarks. Today, we have one million C files, mined from open-source > > repositories, that com...
2007 Dec 16
3
[LLVMdev] Question about coalescing
Dear guys, I want to coalesce some copies, and I would like to know if there is any method that I can call, like JoinCopy from the old (LLVM 1.9) LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM 2.1), but I do not want to call this analysis, as I have my own. basically, I can determine that two virtuals do not overlap, and I know that it is safe to join them. In
2007 Nov 23
0
[LLVMdev] global register allocation.
...very aggressive inlining of method calls, and this may cause the benefits of interprocedural register allocation to be very small, if any. There was one guy (google for Philip Brisk) who was working with interprocedural RA on SSA-form programs. best, Fernando > On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: >> >> >> Hi, Sanjiv, >> >> those passes operate on the whole machine function. Each machine >> function contains many basic blocks. If a program has many functions, the >> register allocator will be called...
2006 Jun 27
2
[LLVMdev] Mapping bytecode to X86
...> a := b a := a op c a := c 2) a := a op c --> a := c 3) a := b op a --> a := a op b --> a := b (???) What if the operation in (3) is non-commutative? Thanks a lot, Fernando > On Mon, 26 Jun 2006, Fernando Magno Quintao Pereira wrote: > > The problem is that, after the TwoAddressInstructionPass is used, the > > code is no longer in SSA form, and my register allocator rely on > > some SSA properties. I am using the Spiller in VirtRegMap.* to generate > > the code, but the incorrect mapping s...
2007 Jun 14
2
[LLVMdev] Moving data between regs
...cator does not currently use a move to a different register class in lieu of spills. This is definitely something we should do in the future. Can you file a bugzilla enhancement request? Thanks, Evan On Jun 13, 2007, at 11:09 AM, Chris Lattner wrote: > On Tue, 12 Jun 2007, Fernando Magno Quintao Pereira wrote: >> Imagine that I have a virtual v stored in register AL, and I >> am about >> to cross a function call, that effectively overwrites AL. Well, I >> have, >> say, register ESI free, but as it happens, ESI is bigger than AL. It >> should be t...
2007 Apr 03
0
[LLVMdev] Graph Coloring Regalloc
...the testing state. Probably I'll try commit it before the 2.0 release. However, my progress on this work is very unstable and the main goal of implementing the algorithm is my diploma. Register allocation via coloring of chordal graphs was also developed within LLVM by someone (Fernando Magno Quintao Pereira if I remember well), AFAIK, but I don't know whether he wants to commit his implementation. Probably, he'll answer you, too :) I've just downloaded llvm from cvs. And didn't find any RegAllocGraphColoring.cpp here. Could you give me a link to it as I'm interested in thi...
2016 Dec 31
2
Automatic Insertion of OpenACC/OpenMP directives
...y(x[0:AI1[5]],y[0:AI1[5]]) #pragma acc kernels for (int i = 0; i < n; ++i) { y[j] = a * x[i] + y[j]; ++j; } } Regards, Fernando On Sat, Dec 31, 2016 at 3:58 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > Hi, > >> On Dec 31, 2016, at 8:33 AM, Fernando Magno Quintao Pereira via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Dear LLVMers, >> >> we have released a tool that uses LLVM to insert OpenACC or OpenMP >> 4.0 directives in programs. You can use the tool online here: >> http://cuda.dcc.ufmg.br/dawn/. Our t...
2006 Jul 02
0
[LLVMdev] Inserting move instruction
On Sun, 2 Jul 2006, Fernando Magno Quintao Pereira wrote: > MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); > const TargetRegisterClass *rc = mf.getSSARegMap()->getRegClass(dst); > const MRegisterInfo * reg_info = mf.getTarget().getRegisterInfo(); > reg_info->copyRegToReg(mbb, iter, dst, src, rc);...
2006 Sep 25
2
[LLVMdev] Folding instructions on X86
Dear LLVMers, I need help with one error in my register allocator. I am getting errors when folding instructions for the x86 (it does not happen when I use the PowerPC as target). The problem is that, when I execute something like: mi = mbb->insert(mbb->erase(mi), fmi), where mbb is a MachineBasicBlock, valgrind gives this error message: Address 0x42C62B0 is 24 bytes inside a block
2007 Feb 22
2
[LLVMdev] Reference to recently created move
Hey, guys, I am creating some move instructions with MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction that I just created? Is there a way to do something like: // mbb is MachineBasicBlock, reg_info is MRegisterInfo MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); reg_info->copyRegToReg(mbb, iter, dst, src, rc); iter--; (???) MachineInstr *
2007 Feb 22
0
[LLVMdev] Reference to recently created move
copyRegToReg() always insert the move instruction before "iter". Just use prior(iter) after the insertion to reference the newly created move instruction. Evan On Feb 21, 2007, at 11:17 PM, Fernando Magno Quintao Pereira wrote: > > Hey, guys, I am creating some move instructions with > MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction > that I just created? Is there a way to do something like: > > // mbb is MachineBasicBlock, reg_info is MRegisterInfo > > Machin...
2007 Apr 03
1
[LLVMdev] Graph Coloring Regalloc
...ably I'll try > commit it before the 2.0 release. However, my progress on this work is very > unstable and the main goal of implementing the algorithm is my diploma. > > Register allocation via coloring of chordal graphs was also developed within > LLVM by someone (Fernando Magno Quintao Pereira if I remember well), AFAIK, > but I don't know whether he wants to commit his implementation. Probably, > he'll answer you, too :) > > I've just downloaded llvm from cvs. And didn't find any > RegAllocGraphColoring.cpp here. Could you give me a link to it as I...
2007 Apr 12
0
[LLVMdev] Regalloc Refactoring
>> And I have a quite fast algo that I believe is simpler than [Budimlic02] >> and I can share it with you :) > > Do you have a paper on this? I'd be interested in seeing it. > Yes, I have a tech report on this page: http://compilers/fernando/projects/soc/ and I have submitted a paper to SAS, and now I am waiting for the review. The coalescing algorithm is described in
2007 Jun 13
0
[LLVMdev] Moving data between regs
On Tue, 12 Jun 2007, Fernando Magno Quintao Pereira wrote: > Imagine that I have a virtual v stored in register AL, and I am about > to cross a function call, that effectively overwrites AL. Well, I have, > say, register ESI free, but as it happens, ESI is bigger than AL. It > should be technically possible to move the conten...
2007 Jul 03
2
[LLVMdev] Swaps of FP registers
Dear guys, what is the best way to implement a swap of floating point registers in X86? For the integer registers, I am using xchg. Is there a similar instruction for floating point? My function to insert swaps is like: void X86RegisterInfo::swapRegs( MachineBasicBlock & mbb, MachineBasicBlock::iterator mi, unsigned r1, unsigned r2, const TargetRegisterClass
2007 Jul 04
0
[LLVMdev] Swaps of FP registers
On 7/3/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > what is the best way to implement a swap of floating point registers > in X86? For the integer registers, I am using xchg. Is there a similar > instruction for floating point? FXCH swaps stN with st0, but you'd have to use me...
2007 Jul 13
3
[LLVMdev] NO-OP
Guys, I am in need of a no-op instruction: an instruction that does not do anything, and has no operands. Does LLVM predefine such an instruction? I want to transform the program so that there is no empty basic block. Fernando
2007 Aug 18
0
[LLVMdev] Debugger for Register Allocation
On Aug 17, 2007, at 4:17 PM, Fernando Magno Quintao Pereira wrote: > > Hi guys, > > I have been using a debugger for my register allocator. The > debugger > happened to be very useful at catching register assignment errors. > I've > put the debugger on-line, if anyone who is working with register > allocation...