search for: magno

Displaying 20 results from an estimated 202 matches for "magno".

2015 Sep 25
2
Asterisk => Mediant 1000 (AudioCodes) => PSTN (E1)
Does anyone have any information for me? Welinghton. Citando Welinghton Magno Guimaraes <welinghton.guimaraes at ufvjm.edu.br>: > Hello! > ? > I am setting up an Asterisk server with a Mediant 1000 (Audiocodes) > to make external links. Does anyone have any manual or instructions on > how to proceed? > ? > Asterisk ?=>? Mediant 1000...
2007 Nov 23
2
[LLVMdev] global register allocation.
On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Hi, Sanjiv, > > those passes operate on the whole machine function. Each machine > function contains many basic blocks. If a program has many functions, the > register allocator will be called as many times, i.e i...
2007 Nov 25
1
[LLVMdev] global register allocation.
...saving information between regalloc passes for different functions may not be enough for my case. I will need to maintain the regalloc info of various passes in the call graph order. Anyways thanks for your inputs. I will get back if I need to learn more. Sanjiv On Nov 23, 2007 11:29 PM, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > Hi, again, > > I think you can do it in the same way that the other allocators have > been coded, i.e extend RA, register the pass and so forth. I am not sure > about the best way to pass information among a run of Reg...
2011 Sep 27
0
[LLVMdev] Greedy Register Allocation in LLVM 3.0
...example, from the top of my head I would name the following papers: 1)  A Generalized Algorithm for Graph-Coloring Register Allocation by Michael D. Smith, Norman Ramsey and Glenn Holloway      http://www.cs.tufts.edu/~nr/pubs/gcra-abstract.html 2) Register allocation by puzzle solving by Fernando Magno Quintão Pereira, Jens Palsberg      http://llvm.org/pubs/2008-06-PLDI-PuzzleSolving.pdf I think I've seen a few more papers on this topic, but cannot remember them at the moment. If I find more papers in my collection I'll let you know. /Roman >________________________________ >V...
2011 Sep 27
3
[LLVMdev] Greedy Register Allocation in LLVM 3.0
On Sep 27, 2011, at 12:11 AM, Leo Romanoff wrote: > Quite some of these register allocation proposals are also able to handle overlapping register classes. That's interesting. Do you have any references? /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110927/e4b1f13d/attachment.html>
2017 Jan 03
2
Automatic Insertion of OpenACC/OpenMP directives
> On Jan 3, 2017, at 7:17 AM, Jonathan Roelofs <jonathan at codesourcery.com> wrote: > > > > On 12/31/16 12:37 PM, Fernando Magno Quintao Pereira via llvm-dev wrote: >> Dear Mehdi, >> >> I've changed your example a little bit: >> >> float saxpy(float a, float *x, float *y, int n) { >> int j = 0; >> for (int i = 0; i < n; ++i) { >> y[j] = a*x[i] + y[I]; // Change ...
2020 Feb 22
3
The AnghaBench collection of compilable programs
...cense the code is published. That may be a problem for some users. > > Have you thought about integrating the benchmarks as external tests into LLVM’s test-suite? That would make it very easy to play around with. > > Cheers, > Florian > > > On 22 Feb 2020, at 14:56, Fernando Magno Quintao Pereira via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > Dear LLVMers, > > > > we, at UFMG, have been building a large collection of compilable > > benchmarks. Today, we have one million C files, mined from open-source > > repositories,...
2007 Dec 16
3
[LLVMdev] Question about coalescing
Dear guys, I want to coalesce some copies, and I would like to know if there is any method that I can call, like JoinCopy from the old (LLVM 1.9) LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM 2.1), but I do not want to call this analysis, as I have my own. basically, I can determine that two virtuals do not overlap, and I know that it is safe to join them. In
2007 Nov 23
0
[LLVMdev] global register allocation.
...M does very aggressive inlining of method calls, and this may cause the benefits of interprocedural register allocation to be very small, if any. There was one guy (google for Philip Brisk) who was working with interprocedural RA on SSA-form programs. best, Fernando > On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: >> >> >> Hi, Sanjiv, >> >> those passes operate on the whole machine function. Each machine >> function contains many basic blocks. If a program has many functions, the >> register allocator will be...
2006 Jun 27
2
[LLVMdev] Mapping bytecode to X86
...--> a := b a := a op c a := c 2) a := a op c --> a := c 3) a := b op a --> a := a op b --> a := b (???) What if the operation in (3) is non-commutative? Thanks a lot, Fernando > On Mon, 26 Jun 2006, Fernando Magno Quintao Pereira wrote: > > The problem is that, after the TwoAddressInstructionPass is used, the > > code is no longer in SSA form, and my register allocator rely on > > some SSA properties. I am using the Spiller in VirtRegMap.* to generate > > the code, but the incorrect m...
2007 Jun 14
2
[LLVMdev] Moving data between regs
...allocator does not currently use a move to a different register class in lieu of spills. This is definitely something we should do in the future. Can you file a bugzilla enhancement request? Thanks, Evan On Jun 13, 2007, at 11:09 AM, Chris Lattner wrote: > On Tue, 12 Jun 2007, Fernando Magno Quintao Pereira wrote: >> Imagine that I have a virtual v stored in register AL, and I >> am about >> to cross a function call, that effectively overwrites AL. Well, I >> have, >> say, register ESI free, but as it happens, ESI is bigger than AL. It >> sho...
2007 Apr 03
0
[LLVMdev] Graph Coloring Regalloc
...is in the testing state. Probably I'll try commit it before the 2.0 release. However, my progress on this work is very unstable and the main goal of implementing the algorithm is my diploma. Register allocation via coloring of chordal graphs was also developed within LLVM by someone (Fernando Magno Quintao Pereira if I remember well), AFAIK, but I don't know whether he wants to commit his implementation. Probably, he'll answer you, too :) I've just downloaded llvm from cvs. And didn't find any RegAllocGraphColoring.cpp here. Could you give me a link to it as I'm intereste...
2016 Dec 31
2
Automatic Insertion of OpenACC/OpenMP directives
...a pcopy(x[0:AI1[5]],y[0:AI1[5]]) #pragma acc kernels for (int i = 0; i < n; ++i) { y[j] = a * x[i] + y[j]; ++j; } } Regards, Fernando On Sat, Dec 31, 2016 at 3:58 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > Hi, > >> On Dec 31, 2016, at 8:33 AM, Fernando Magno Quintao Pereira via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Dear LLVMers, >> >> we have released a tool that uses LLVM to insert OpenACC or OpenMP >> 4.0 directives in programs. You can use the tool online here: >> http://cuda.dcc.ufmg.br/dawn...
2011 Dec 01
1
yajl 2.0
Hello, In Arch Linux. The yajl library distributed is a newer than used by Xen in mercurial. Is there an interest in this patch. I also have a PKGBUILD that builds Xen from mercurial in Arch Linux. Regards, -- Felipe Magno de Almeida Sent from my Nokia E71
2006 Jul 02
0
[LLVMdev] Inserting move instruction
On Sun, 2 Jul 2006, Fernando Magno Quintao Pereira wrote: > MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); > const TargetRegisterClass *rc = mf.getSSARegMap()->getRegClass(dst); > const MRegisterInfo * reg_info = mf.getTarget().getRegisterInfo(); > reg_info->copyRegToReg(mbb, iter, dst, s...
2006 Sep 25
2
[LLVMdev] Folding instructions on X86
Dear LLVMers, I need help with one error in my register allocator. I am getting errors when folding instructions for the x86 (it does not happen when I use the PowerPC as target). The problem is that, when I execute something like: mi = mbb->insert(mbb->erase(mi), fmi), where mbb is a MachineBasicBlock, valgrind gives this error message: Address 0x42C62B0 is 24 bytes inside a block
2007 Feb 22
2
[LLVMdev] Reference to recently created move
Hey, guys, I am creating some move instructions with MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction that I just created? Is there a way to do something like: // mbb is MachineBasicBlock, reg_info is MRegisterInfo MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); reg_info->copyRegToReg(mbb, iter, dst, src, rc); iter--; (???) MachineInstr *
2007 Feb 22
0
[LLVMdev] Reference to recently created move
copyRegToReg() always insert the move instruction before "iter". Just use prior(iter) after the insertion to reference the newly created move instruction. Evan On Feb 21, 2007, at 11:17 PM, Fernando Magno Quintao Pereira wrote: > > Hey, guys, I am creating some move instructions with > MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction > that I just created? Is there a way to do something like: > > // mbb is MachineBasicBlock, reg_info is MRegisterInfo > &gt...
2007 Apr 03
1
[LLVMdev] Graph Coloring Regalloc
.... Probably I'll try > commit it before the 2.0 release. However, my progress on this work is very > unstable and the main goal of implementing the algorithm is my diploma. > > Register allocation via coloring of chordal graphs was also developed within > LLVM by someone (Fernando Magno Quintao Pereira if I remember well), AFAIK, > but I don't know whether he wants to commit his implementation. Probably, > he'll answer you, too :) > > I've just downloaded llvm from cvs. And didn't find any > RegAllocGraphColoring.cpp here. Could you give me a link to...
2007 Apr 12
0
[LLVMdev] Regalloc Refactoring
>> And I have a quite fast algo that I believe is simpler than [Budimlic02] >> and I can share it with you :) > > Do you have a paper on this? I'd be interested in seeing it. > Yes, I have a tech report on this page: http://compilers/fernando/projects/soc/ and I have submitted a paper to SAS, and now I am waiting for the review. The coalescing algorithm is described in