search for: registerregalloc

Displaying 20 results from an estimated 25 matches for "registerregalloc".

2006 Aug 20
2
[LLVMdev] Adding register allocator to LLVM
...ll synchronize it. Try adding code like this to your Passes.cpp file: //===---------------------------------------------------------------------===// /// /// RegAlloc command line options. /// //===---------------------------------------------------------------------===// namespace { cl::opt<RegisterRegAlloc::FunctionPassCtor, false, RegisterPassParser<RegisterRegAlloc> > RegAlloc("regalloc", cl::init(&createChordalRegisterAllocator), cl::desc("Register allocator to use: (default = chordal)")); } All the best, Fernando > Hi! >...
2010 May 04
0
[LLVMdev] Register Allocation: Interference graph
...rk and only using > llc -load (and maybe some custom cmd switches). Something similar is > possible with opt but I can't figure it out with llc. Passes in llc are hard-coded in LLVMTargetMachine.cpp. Does your pass actually do register allocation, or will it? If so, you want to use the RegisterRegAlloc object. Here is how linear scan uses it: static RegisterRegAlloc linearscanRegAlloc("linearscan", "linear scan register allocator", createLinearScanRegisterAllocator); Then createRegisterAllocator in CodeGen/Passes.cpp will pick up your allocator and list i...
2007 Sep 05
3
[LLVMdev] Dynamically alternating between register allocators
...s there a simple way to alternate between different register allocators at run time? I would like to decide dynamically which register allocator to use. The decision is based on information that is produced by a pass that executes before register allocation takes place. Is it possible to modify RegisterRegAlloc::Registry to take into consideration this information? Is there any similar example in LLVM? all the best, Fernando
2013 Apr 30
1
[LLVMdev] New Register allocation algorithm
Hi, I wanted to write a new register allocation algorithm. I wrote it the same way RegAllocFast has been written and registered it. I added it to ForceCodegenLinking struct as well. But after build, it is not listed in llc --help. I tried to change the registered name of greedy algorithm to something else and that doesnt seem to be reflecting in llc help either. Am i supposed to build llvm
2006 Aug 22
0
[LLVMdev] Adding register allocator to LLVM
...o your Passes.cpp file: > > > //===---------------------------------------------------------------------===// > /// > /// RegAlloc command line options. > /// > > //===---------------------------------------------------------------------===// > namespace { > cl::opt<RegisterRegAlloc::FunctionPassCtor, false, > RegisterPassParser<RegisterRegAlloc> > > RegAlloc("regalloc", > cl::init(&createChordalRegisterAllocator), > cl::desc("Register allocator to use: (default = chordal)")); > } > > All the be...
2006 Aug 20
0
[LLVMdev] Adding register allocator to LLVM
Hi! I've did what Jim Laskey wrote but llc didn't reckognize my regalloc option. So I moved my allocator implementation into seperate folder within CodeGen and wrote separate makefile for it (like in "Writing an LLVM pass" tutorial). But when I run "make" from LLVMOBJDIR it doesn't enter the RegAlloc directory and when linking llc an error like
2008 Feb 07
1
[LLVMdev] [PATCH] fix warning: 'NumFolded' defined but not used
...locLocal.cpp +++ svn.llvm/lib/CodeGen/RegAllocLocal.cpp @@ -35,7 +35,6 @@ STATISTIC(NumStores, "Number of stores added"); STATISTIC(NumLoads , "Number of loads added"); -STATISTIC(NumFolded, "Number of loads/stores folded into instructions"); namespace { static RegisterRegAlloc @@ -500,12 +499,7 @@ if (PhysReg) { // Register is available, allocate it! assignVirtToPhysReg(VirtReg, PhysReg); } else { // No registers available. - // If we can fold this spill into this instruction, do so now. - SmallVector<unsigned, 2> Ops; - Ops.push_back(...
2006 Aug 03
3
[LLVMdev] Adding register allocator to LLVM
On Thu, 3 Aug 2006, Jim Laskey wrote: > To force the load/linking of your register allocator into the llc/lli tools, > add your create function's global declaration to "Passes.h" and add a > "pseudo" call line to "llvm/Codegen/LinkAllCodegenComponents.h" . Another note: with this new functionality you should be able to dynamically load register
2007 Sep 05
0
[LLVMdev] Dynamically alternating between register allocators
...etween different register > allocators at run time? I would like to decide dynamically which > register > allocator to use. The decision is based on information that is > produced by > a pass that executes before register allocation takes place. > > Is it possible to modify RegisterRegAlloc::Registry to take into > consideration this information? Is there any similar example in LLVM? > > all the best, > > Fernando > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http:/...
2010 May 04
4
[LLVMdev] Register Allocation: Interference graph
David Greene wrote: > On Saturday 01 May 2010 08:34:50 Josef Eisl wrote: >> Hello, >> >> I want learn more about register allocation and do some analysis for a >> current research project. After reading some papers (eg. Chaitin, >> Briggs) I think its time to get my hands dirty :). > > Welcome! > >> First I plan to (re)implement some of the classic
2010 May 18
2
[LLVMdev] Fast register allocation
.../CodeGenAction.cpp index 86005f2..cd2d2f0 100644 --- a/lib/Frontend/CodeGenAction.cpp +++ b/lib/Frontend/CodeGenAction.cpp @@ -322,7 +322,7 @@ bool BackendConsumer::AddEmitPasses() { // Set register scheduler & allocation policy. RegisterScheduler::setDefault(createDefaultScheduler); - RegisterRegAlloc::setDefault(Fast ? createLocalRegisterAllocator : + RegisterRegAlloc::setDefault(Fast ? createFastRegisterAllocator : createLinearScanRegisterAllocator); // Create the code generator passes. I have tested clang self hosting on x86-64 and x64 with this patch. O...
2008 Dec 20
0
[LLVMdev] A faster instruction selector?
...mode for LLVM Makefiles is non-optimized. > Yes, I am running the optimised version >> Finally, it must be possible to select the register allocator for the >> JIT using the API, but I am unable to find out how to do this, any >> ideas? > > See RegAllocRegistry.h and RegisterRegAlloc::setDefault. Thanks > > Dan > Seasons Greetings, Mark.
2016 Feb 26
0
Help Required llc runtime error for simple MachineFunctionPass
.../ Pass Identification GCRA() : MachineFunctionPass(id) { } bool runOnMachineFunction(MachineFunction &MFn) { return false; } void getAnalysisUsage(AnalysisUsage &AU) const { } }; char GCRA::id = 0; } namespace llvm { FunctionPass *createGCRA() { return new GCRA(); } } static RegisterRegAlloc register_gcra("gc", "graph-coloring register allocator", createGCRA); Please help! Sincerely, *Vivek Pandya* -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160226/ad096564/attachment.ht...
2006 Aug 03
0
[LLVMdev] Adding register allocator to LLVM
...vm/CodeGen/RegAllocRegistry.h"" In your register allocator .cpp file define a create function in the form; FunctionPass *createMyRegisterAllocator() { return new MyRegisterAllocator(); } and the "installing" static constructor declaration, in the form; static RegisterRegAlloc myRegAlloc("myregalloc", " my register allocator help string", createMyRegisterAllocator); To force the load/linking of your register allocator into the llc/lli tools, add your create function's global declaration to "Passes.h" and add a "pseud...
2007 Sep 06
1
[LLVMdev] Dynamically alternating between register allocators
...r >> allocators at run time? I would like to decide dynamically which >> register >> allocator to use. The decision is based on information that is >> produced by >> a pass that executes before register allocation takes place. >> >> Is it possible to modify RegisterRegAlloc::Registry to take into >> consideration this information? Is there any similar example in LLVM? >> >> all the best, >> >> Fernando >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu htt...
2009 Aug 11
2
[LLVMdev] llc undefined symbol
...;MF); }; char MyRegisterAllocator::ID = 0; } static RegisterPass<MyRegisterAllocator>X("myregalloc", " my register allocator help string"); FunctionPass* createMyRegisterAllocator() { return new MyRegisterAllocator(); } static RegisterRegAlloc MyRegAlloc("myregalloc", " my register allocator help string", createMyRegisterAllocator); the makefile: LEVEL = ../../.. LIBRARYNAME = LLVMMicha LOADABLE_MODULE = 1 USEDLIBS = #LLVMLIBS = LLVMCore.a LLVMSupport.a LLVMSystem.a LINK_COMPONENTS = support sy...
2006 Aug 03
3
[LLVMdev] Adding register allocator to LLVM
Hi! I'm developing a register allocator and need it to be available as an option for llc tool. I used to edit /lib/CodeGen/Passes.cpp for this aim but after yesterday's update these options are defined somewhere else and I can't find the place. Thanks for your help. Tony. -------------- next part -------------- An HTML attachment was scrubbed... URL:
2008 Dec 17
1
[LLVMdev] A faster instruction selector?[MESSAGE NOT SCANNED]
Hi Nicolas and Dan, Thanks for your replies. I've been playing around with various setting, as you suggested. > What version of LLVM are you using here? I'm using 2.4 My original time ratios of reg-alloc to instruction selection (1:12) referred to the local register allocator and the standard instruction selector (all passes), not a sensible comparison, I realise. > I did
2006 Nov 20
0
[LLVMdev] FP emulation (continued)
On Fri, 17 Nov 2006, Roman Levenstein wrote: > I still have some questions about FP emulation for my embedded target. > To recap a bit: > My target only has integer registers and no hardware support for FP. FP > is supported only via emulation. Only f64 is supported. All FP > operations should be implemented to use i32 registers. ok > allocation. But anyway, I have an almost
2020 Jul 11
2
[RFC] Introducing classes for the codegen driven by new pass manager
...- There is a need to force codegen to run according to the callgraph. Currently, this is achieved by adding a dummy CGSCC pass as the container pass of codegen passes. In NPM, this could be implemented by pre-sorting IR functions by callgraph order in the machine pass manager. - MachinePassRegistry/RegisterRegAlloc/RegisterScheduler. These are for dynamic registering machine passes and also used for in-tree machine passes. Personlly I don't think this is needed and similar opinions were expressed before (https://reviews.llvm.org/D54203#1291969). We should probably just register them as normal passes. - Ti...