llvm dev - Jan 2018 - AArch64 v1i64 and v1f64 data types

Hi Tim and all,


A recent commit to the type legalizer has highlighted AArch64's use of v1
data types, could you shine some light on why they've been declared as
legal? And any particularly awkward barriers that prevent them from being
removed as legal?


cheers,


Sam Parker

Compilation Tools Engineer | Arm

. . . . . . . . . . . . . . . . . . . . . . . . . . .

Arm.com
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On 1/12/2018 1:02 AM, Sam Parker via llvm-dev wrote:
>
> Hi Tim and all,
>
>
> A recent commit to the type legalizer has highlighted AArch64's use of 
> v1 data types, could you shine some light on why they've been declared 
> as legal? And any particularly awkward barriers that prevent them from 
> being removed as legal?
>
v1i64 specifically is used to indicate that a value should be stored in 
a SIMD register (as opposed to an integer register, like we use for 
i64).  This allows instruction selection to select instructions which 
produce and use i64 values in SIMD registers, like loads, stores, and 
i64<->f64 conversions.

This isn't the only possible approach, but it seems to work reasonably 
well as-is.

-Eli


-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux
Foundation Collaborative Project

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