(this patch is intended to provide people with a temporary
solution to S3 of MSI dom0, before a more formal solution
based on trap and emulation.)
This patch adds a temporary workaround to enable S3 resume
with MSI devices.
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by: Qing He <qing.he@intel.com>
---
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index d986afb..b40c6d0 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -20,6 +20,8 @@
#include <asm/errno.h>
#include <asm/io.h>
+#include <asm/xen/hypervisor.h>
+
#include "pci.h"
#include "msi.h"
@@ -269,7 +271,8 @@ void write_msi_msg(unsigned int irq, struct msi_msg *msg)
{
struct irq_desc *desc = irq_to_desc(irq);
- write_msi_msg_desc(desc, msg);
+ if (!xen_initial_domain())
+ write_msi_msg_desc(desc, msg);
}
static int msi_free_irqs(struct pci_dev* dev);
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