search for: vcpuid

Why is there an argument returned in the function below (of hvm.h), knowing that there is void? static inline void hvm_init_ap_context(struct vcpu_guest_context *ctxt, int vcpuid, int trampoline_vector) { return hvm_funcs.init_ap_context(ctxt, vcpuid, trampoline_vector); } _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...vate_irqs); >> + >> + if ( hvm_save_entry(GIC, v->vcpu_id, h, &ctxt) != 0 ) >> + return 1; >> + } >> + return 0; >> +} >> + >> +static int gic_load(struct domain *d, hvm_domain_context_t *h) >> +{ >> + int vcpuid; >> + struct hvm_hw_gic ctxt; >> + struct vcpu *v; >> + >> + /* Which vcpu is this? */ >> + vcpuid = hvm_load_instance(h); >> + if ( vcpuid >= d->max_vcpus || (v = d->vcpu[vcpuid]) == NULL ) >> + { >> + dprintk(XENLOG...

I''ve put together two patches. The first introduces a new dom0_op, set_max_vcpus, which with an associated variable and a check in the VCPUOP handler fixes [1]bug 288. Also included is a new VCPUOP, VCPUOP_create, which handles all of the vcpu creation tasks and leaves initialization and unpausing to VCPUOP_initialize. The separation allows for build-time allocation of vcpus which

...+ ctxt.apic_assist = v->arch.hvm_vcpu.viridian.apic_assist.raw; + + if ( hvm_save_entry(VIRIDIAN_VCPU, v->vcpu_id, h, &ctxt) != 0 ) + return 1; + } + + return 0; +} + +static int viridian_load_vcpu_ctxt(struct domain *d, hvm_domain_context_t *h) +{ + int vcpuid; + struct vcpu *v; + struct hvm_viridian_vcpu_context ctxt; + + vcpuid = hvm_load_instance(h); + if ( vcpuid >= d->max_vcpus || (v = d->vcpu[vcpuid]) == NULL ) + { + gdprintk(XENLOG_ERR, "HVM restore: domain has no vcpu %u\n", vcpuid); + return -EINVA...

Hi all, this patch series introduces support for runstate_memory_area on ARM. The first patch moves VCPUOP_register_runstate_memory_area to common code, while the second one add VCPUOP_register_runstate_memory_area to the whilelist of vcpu_op hypercalls supported on ARM and properly updates the runstate_memory_area during vcpu context switch. Stefano Stabellini (2): xen: move

Hi all, this small patch series implement guest SMP support for ARM, using the ARM PSCI interface for secondary cpu bringup. Stefano Stabellini (4): xen/arm: basic PSCI support, implement cpu_on xen/arm: support for guest SGI xen/arm: support vcpu_op hypercalls xen: move VCPUOP_register_vcpu_info to common code xen/arch/arm/domain.c | 66 ++++++++++++++++++++++++

...eak; + default: + rc = ERROR_INVAL; + break; + } + break; + default: + rc = ERROR_INVAL; + break; + } + + return rc; +} + int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, libxl_trigger trigger, uint32_t vcpuid) { int rc; + GC_INIT(ctx); switch (trigger) { case LIBXL_TRIGGER_POWER: @@ -4668,8 +4695,7 @@ int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, XEN_DOMCTL_SENDTRIGGER_RESET, vcpuid); break; case LIBXL_TRIGGER_S3RESUME: -...

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list

Hi all, This is the second take of a patch that I submitted some time ago for allowing specifying vcpu pinning taking NUMA nodes into account. IOW, something like this: * "nodes:0-3": all pCPUs of nodes 0,1,2,3;  * "nodes:0-3,^node:2": all pCPUS of nodes 0,1,3;  * "1,nodes:1-2,^6": pCPU 1 plus all pCPUs of nodes 1,2    but not pCPU 6; v1 was a single patch, this is

...cpu.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/xen/include/public/vcpu.h b/xen/include/public/vcpu.h index e888daf..a5ca44d 100644 --- a/xen/include/public/vcpu.h +++ b/xen/include/public/vcpu.h @@ -35,6 +35,9 @@ * @cmd == VCPUOP_??? (VCPU operation). * @vcpuid == VCPU to operate on. * @extra_args == Operation-specific extra arguments (NULL if none). + * + * For x86 HVM domains that use VCPU operations the VCPU ID is the ACPI ID + * of the CPU, as fetched from the MADT table. */ /* -- 1.7.7.5 (Apple Git-26) __________________________________...

...u.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/xen/include/public/vcpu.h b/xen/include/public/vcpu.h index e888daf..f09367a 100644 --- a/xen/include/public/vcpu.h +++ b/xen/include/public/vcpu.h @@ -35,6 +35,10 @@ * @cmd == VCPUOP_??? (VCPU operation). * @vcpuid == VCPU to operate on. * @extra_args == Operation-specific extra arguments (NULL if none). + * + * For x86 HVM domains that use VCPU operations the VCPU ID is the ACPI + * Processor ID of the CPU (not to be confused with the APIC ID), as + * fetched from the MADT table. */ /* -- 1.7.7.5...

Xen/MCE: vMCE injection In our test for win8 guest mce, we find a bug that no matter what SRAO/SRAR error xen inject to win8 guest, it always reboot. The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs). This patch fix vMCE injection bug, injecting vMCE# to all vcpus. Signed-off-by: Liu,

...break; >> + default: >> + rc = ERROR_INVAL; >> + break; >> + } >> + >> + return rc; >> +} >> + >> int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, >> libxl_trigger trigger, uint32_t vcpuid) { >> int rc; >> + GC_INIT(ctx); >> >> switch (trigger) { >> case LIBXL_TRIGGER_POWER: >> @@ -4668,8 +4695,7 @@ int libxl_send_trigger(libxl_ctx *ctx, >> uint32_t domid, >> XEN_DOMCTL_SENDT...

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

...-r 1ae74f060a39 tools/libxl/libxl.c --- a/tools/libxl/libxl.c Mon Jan 10 10:37:53 2011 +0000 +++ b/tools/libxl/libxl.c Mon Jan 10 10:58:50 2011 +0000 @@ -2668,8 +2668,14 @@ static int trigger_type_from_string(char int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, char *trigger_name, uint32_t vcpuid) { int rc = -1; - int trigger_type = trigger_type_from_string(trigger_name); - + int trigger_type = -1; + + if (!strcmp(trigger_name, "s3resume")) { + xc_set_hvm_param(ctx->xch, domid, HVM_PARAM_ACPI_S_STATE, 0); + return 0; + } + + trigger_type = tri...

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

...6dd693 -r 0339f85f6068 xen/include/asm-x86/traps.h --- a/xen/include/asm-x86/traps.h Fri Jan 11 16:22:57 2013 -0800 +++ b/xen/include/asm-x86/traps.h Fri Jan 11 16:24:00 2013 -0800 @@ -48,5 +48,6 @@ extern int guest_has_trap_callback(struc */ extern int send_guest_trap(struct domain *d, uint16_t vcpuid, unsigned int trap_nr); +int emulate_privileged_op(struct cpu_user_regs *regs); #endif /* ASM_TRAP_H */

The series introduces auto-generation of the type definitions used in the libxl interface followed by auto-generation of a destructor function for each type. In the future it may be possible to use the related data structures for other purposes, for example auto-generation of the functions to marshal between C and language binding data types. tools/_libxl_types.h should be identical both before

...al(&c_scinfo, scinfo); + + INIT_CTX(); + ret = libxl_sched_credit_domain_set(&ctx, Int_val(domid), &c_scinfo); + if (ret != 0) + failwith_xl("sched_credit_domain_set"); + FREE_CTX(); + + CAMLreturn(Val_unit); +} + +value stub_xl_send_trigger(value domid, value trigger, value vcpuid) +{ + CAMLparam3(domid, trigger, vcpuid); + struct libxl_ctx ctx; + int ret; + + INIT_CTX(); + ret = libxl_send_trigger(&ctx, Int_val(domid), String_val(trigger), Int_val(vcpuid)); + if (ret != 0) + failwith_xl("send_trigger"); + FREE_CTX(); + CAMLreturn(Val_unit); +} + +value stub_x...

...d long vgr[16]; + unsigned long bank1_regs[16]; /* bank1 regs (r16-r31) + when bank0 active */ + }; + union { + unsigned long vbgr[16]; + unsigned long bank0_regs[16]; /* bank0 regs (r16-r31) + when bank1 active */ + }; + unsigned long vnat; + unsigned long vbnat; + unsigned long vcpuid[5]; + unsigned long reserved3[11]; + unsigned long vpsr; + unsigned long vpr; + unsigned long reserved4[76]; + union { + unsigned long vcr[128]; + struct { + unsigned long dcr; /* CR0 */ + unsigned long itm; + unsigned long iva; + unsigned long rsv1[5]; + unsigned long pta; /* CR8 */ +...