search for: cpuid

...enpm.c @@ -36,7 +36,7 @@ #define CPUFREQ_TURBO_ENABLED 1 static xc_interface *xc_handle; -static int max_cpu_nr; +static unsigned int max_cpu_nr; /* help message */ void show_help(void) @@ -77,6 +77,33 @@ void help_func(int argc, char *argv[]) show_help(); } +static void parse_cpuid(const char *arg, int *cpuid) +{ + if ( sscanf(arg, "%d", cpuid) != 1 || *cpuid < 0 ) + { + if ( strcasecmp(arg, "all") ) + { + fprintf(stderr, "Invalid CPU identifier: ''%s''\n", arg); + exit(EINVAL); +...

Hi, xl is currently ignoring the cpuid= variable in the config file. As I don''t like the current interface xm exposes (basically because it is complicated, unintuitive and very error prone), I implemented a new scheme for specifying CPUID flags policy, combining QEMU''s and Xen''s approach: cpuid = "<bas...

On Thu, Sep 18, 2014 at 11:58 AM, Paolo Bonzini <pbonzini at redhat.com> wrote: > >> > Actually, that MSR address range has been reserved for that purpose, along >> > with: >> > - CPUID.EAX=1 -> ECX bit 31 (always returns 0 on bare metal) >> > - CPUID.EAX=4000_00xxH leaves (i.e. HYPERVISOR CPUID) >> >> I don't know whether this is documented anywhere, but Linux tries to >> detect a hypervisor by searching CPUID leaves 0x400xyz00 for >> &quot...

On Thu, Sep 18, 2014 at 11:58 AM, Paolo Bonzini <pbonzini at redhat.com> wrote: > >> > Actually, that MSR address range has been reserved for that purpose, along >> > with: >> > - CPUID.EAX=1 -> ECX bit 31 (always returns 0 on bare metal) >> > - CPUID.EAX=4000_00xxH leaves (i.e. HYPERVISOR CPUID) >> >> I don't know whether this is documented anywhere, but Linux tries to >> detect a hypervisor by searching CPUID leaves 0x400xyz00 for >> &quot...

...t; wrote: >> On Thu, Sep 18, 2014 at 5:49 PM, Nakajima, Jun <jun.nakajima at intel.com> wrote: >>> On Thu, Sep 18, 2014 at 3:07 PM, Andy Lutomirski <luto at amacapital.net> wrote: >>> >>>> So, as a concrete straw-man: >>>> >>>> CPUID leaf 0x48000000 would return a maximum leaf number in EAX (e.g. >>>> 0x48000001) along with a signature value (e.g. "CrossHVPara\0") in >>>> EBX, ECX, and EDX. >>>> >>>> CPUID 0x48000001.EAX would contain an MSR number to read to get a >&...

...t; wrote: >> On Thu, Sep 18, 2014 at 5:49 PM, Nakajima, Jun <jun.nakajima at intel.com> wrote: >>> On Thu, Sep 18, 2014 at 3:07 PM, Andy Lutomirski <luto at amacapital.net> wrote: >>> >>>> So, as a concrete straw-man: >>>> >>>> CPUID leaf 0x48000000 would return a maximum leaf number in EAX (e.g. >>>> 0x48000001) along with a signature value (e.g. "CrossHVPara\0") in >>>> EBX, ECX, and EDX. >>>> >>>> CPUID 0x48000001.EAX would contain an MSR number to read to get a >&...

I'm not sure what you mean by "this mechanism?" Are you suggesting that each hypervisor put "CrossHVPara\0" somewhere in the 0x40000000 - 0x400fffff CPUID range, and an OS has to do a full scan of this CPUID range on boot to find it? That seems pretty inefficient. An OS will take 1000's of hypervisor intercepts on every boot just to search this CPUID range. I suggest we come to consensus on a specific CPUID leaf where an OS needs to look to de...

I'm not sure what you mean by "this mechanism?" Are you suggesting that each hypervisor put "CrossHVPara\0" somewhere in the 0x40000000 - 0x400fffff CPUID range, and an OS has to do a full scan of this CPUID range on boot to find it? That seems pretty inefficient. An OS will take 1000's of hypervisor intercepts on every boot just to search this CPUID range. I suggest we come to consensus on a specific CPUID leaf where an OS needs to look to de...

This is a bug fixing. So it needs go into 4.1. x86: add volatile prefix for cpuid asm clauses cpuid results are possible to be changed now. For example, changing CR4.OSXSAVE bit or setting MSR XCR_XFEATURE_ENABLED_MASK may change XSAVE related cpuid leave return values. The volatile prefix is required to avoid the second cpuid calls following some possible changing operations...

Hi Keir, For HVM guests, all cpuid Fn''s going through domain_cpuid() iterate over the loop and then return 0 for all four registers. Guests OS''s and cpuid tools in HVM which query for cpuid Fn 0000.0000 %eax and 8000.0000 %eax, see the value 0 and think, Xen emulates oldish 386/486 CPUs. This leads to strange boo...

Hi, Please find below the proposal for the generic use of cpuid space allotted for hypervisors. Apart from this cpuid space another thing worth noting would be that, Intel & AMD reserve the MSRs from 0x40000000 - 0x400000FF for software use. Though the proposal doesn't talk about MSR's right now, we should be aware of these reservations as we may wa...

Hi, Please find below the proposal for the generic use of cpuid space allotted for hypervisors. Apart from this cpuid space another thing worth noting would be that, Intel & AMD reserve the MSRs from 0x40000000 - 0x400000FF for software use. Though the proposal doesn't talk about MSR's right now, we should be aware of these reservations as we may wa...

...tify.c index 33f35de..a4a3763 100644 --- a/identify.c +++ b/identify.c @@ -9,8 +9,8 @@ void get_cpu_info_basics(struct cpudata *cpu) { - unsigned int maxi, maxei, vendor, address_bits; - unsigned int eax; + unsigned int maxi, maxei, maxhv, vendor, address_bits; + unsigned int eax, ebx, ecx; cpuid(cpu->number, 0, &maxi, &vendor, NULL, NULL); maxi &= 0xffff; /* The high-order word is non-zero on some Cyrix CPUs */ @@ -19,7 +19,7 @@ void get_cpu_info_basics(struct cpudata *cpu) return; /* Everything that supports cpuid supports these. */ - cpuid(cpu->number, 1, &amp...

...tify.c index 33f35de..a4a3763 100644 --- a/identify.c +++ b/identify.c @@ -9,8 +9,8 @@ void get_cpu_info_basics(struct cpudata *cpu) { - unsigned int maxi, maxei, vendor, address_bits; - unsigned int eax; + unsigned int maxi, maxei, maxhv, vendor, address_bits; + unsigned int eax, ebx, ecx; cpuid(cpu->number, 0, &maxi, &vendor, NULL, NULL); maxi &= 0xffff; /* The high-order word is non-zero on some Cyrix CPUs */ @@ -19,7 +19,7 @@ void get_cpu_info_basics(struct cpudata *cpu) return; /* Everything that supports cpuid supports these. */ - cpuid(cpu->number, 1, &amp...

# HG changeset patch # User Jim Fehlig <jfehlig@suse.com> # Date 1360861948 -3600 # Node ID 0f9c7503650fa1b1103b769e1129d66ff614b2ad # Parent cffb489a6df37d8d114e7d2d53a7a85d14e8f968 tools/xend: Only add cpuid and cpuid_check to sexpr once When converting a XendConfig object to sexpr, cpuid and cpuid_check were being emitted twice in the resulting sexpr. The first conversion writes incorrect sexpr, causing parsing of the sexpr to fail when xend is restarted and domain sexpr files in /var/lib/xend/domai...

On Tue, Apr 28, 2020 at 05:17:14PM +0200, Joerg Roedel wrote: > From: Mike Stunes <mstunes at vmware.com> > > To avoid a future VMEXIT for a subsequent CPUID function, cache the > results returned by CPUID into an xarray. > > [tl: coding standard changes, register zero extension] > > Signed-off-by: Mike Stunes <mstunes at vmware.com> > Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com> > [ jroedel at suse.de: -...

On Tue, Apr 28, 2020 at 05:17:14PM +0200, Joerg Roedel wrote: > From: Mike Stunes <mstunes at vmware.com> > > To avoid a future VMEXIT for a subsequent CPUID function, cache the > results returned by CPUID into an xarray. > > [tl: coding standard changes, register zero extension] > > Signed-off-by: Mike Stunes <mstunes at vmware.com> > Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com> > [ jroedel at suse.de: -...

# HG changeset patch # User Olaf Hering <olaf@aepfle.de> # Date 1338572607 -7200 # Node ID 3da83ff08d6b6431c104a431d6617ccb5977643b # Parent fde8ad0252ee6ddb8d71dda869db3b20b3d9ca62 xl.cfg: document the cpuid= option Signed-off-by: Olaf Hering <olaf@aepfle.de> diff -r fde8ad0252ee -r 3da83ff08d6b docs/man/xl.cfg.pod.5 --- a/docs/man/xl.cfg.pod.5 +++ b/docs/man/xl.cfg.pod.5 @@ -969,9 +969,47 @@ XXX XXX -=item B<cpuid=XXX> +=item B<cpuid="STRING"> or B<cpuid=[ "X...

...Sep 19, 2014 at 09:40:07AM -0700, H. Peter Anvin wrote: > On 09/19/2014 09:37 AM, Gleb Natapov wrote: > > > > Linux detects what hypervior it runs on very early > > Not anywhere close to early enough. We're talking for uses like kASLR. > Still to early to do: h = cpuid(HYPERVIOR_SIGNATURE) if (h == KVMKVMKVM) { if (cpuid(kvm_features) & kvm_rnd) rdmsr(kvm_rnd) else (h == HyperV) { if (cpuid(hv_features) & hv_rnd) rdmsr(hv_rnd) else (h == XenXenXen) { if (cpuid(xen_features) & xen_rnd) rdmsr(xen_rnd)...

...Sep 19, 2014 at 09:40:07AM -0700, H. Peter Anvin wrote: > On 09/19/2014 09:37 AM, Gleb Natapov wrote: > > > > Linux detects what hypervior it runs on very early > > Not anywhere close to early enough. We're talking for uses like kASLR. > Still to early to do: h = cpuid(HYPERVIOR_SIGNATURE) if (h == KVMKVMKVM) { if (cpuid(kvm_features) & kvm_rnd) rdmsr(kvm_rnd) else (h == HyperV) { if (cpuid(hv_features) & hv_rnd) rdmsr(hv_rnd) else (h == XenXenXen) { if (cpuid(xen_features) & xen_rnd) rdmsr(xen_rnd)...