Displaying 20 results from an estimated 27 matches for "procesor".
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processor
2006 Jul 15
2
Dumb question about a Xeon Procesor
Sorry to ask here but never used a Xeon before. Tomorrow i need to
install Centos 4.3 on a Quad Xeon (not dual core). Xeon is a 32 bit or
64 bit system?
I already have centos 4.3 x86_64 on a Dvd and im not sure if i need to
download another ISO or can I use the one i have?
Again, sorry to ask.
--
------------------------------------------------------------
Erick Perez
2006 Oct 18
2
Need new way to improve SMP scalability for network router
Hi,
Currently I use dual cpu xeon server x86-64 with hp enabled
two intel Gbit Nics 82547
I have assigned every NIC irq to one phisical procesor but the two
virtual procesors stay idle
and are not used for ether routeing or shaping
Is there a way to split work from two NICs on 4 CPUs ?
2006 Feb 12
3
Problem with Playback sound in 64 bit machine
Sorry for re-posting this message -
I am trying to run the latest stable Asterix version 1.2.4. on 64 bit amd
procesor.
Things are working but the playback sounds that I hear when tring to connect
over IAX are of very high frequency.
i.e a sentence which should finish in 4 secs finishes in much lesser time.
Where can be the problem? any configuration issue?
Thanks in advance.
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2002 Jun 24
4
Gigabit Etnernet router
Hi,
I would like to build new router with 3 Gigabit Ethernet card. Need I
dual procesor system or not ? I would like to have trafic controling (htb
or cbq/sfq) and firewall (iptables) on this router.
Can you recommend me some good motherborad with 64-bit PCI-X ?
--
`)_|_('' PSIkappa
I k psi _at_ atlantis.sk
2004 Aug 16
2
tuning for samba server
...samba tuning for high performance ?
I have read all the samba docs available, so aim looking for others tips
besides the tcp tunings usually applied in smb.conf ?
i am setting a server on a client site, with many clients (about 100), and i
am using a real server hardware (an HP netserver with xeon procesor@2.8Ghz,
1Gig of RAm and fast scsi hdds (scsi 320 @ 15krpm). the budget can be
stressed out for buying a raid enable server :-) .
thanks for all your help.
RP
____________________
Ra?l Pitt? Palma
Associate
Global Engineering and Technology S.A.
m?vil. (507) - 616 - 0194
2009 Dec 01
2
[LLVMdev] thumb2 has divide instructions
OK, here's a patch that follows your suggestion. I'm not an authorized
developer, so I can't commit it myself. The test case is also attached again.
bagel
Jim Grosbach wrote:
> Ah, ok. I was comparing v7-A and v7-R only. The M3 is described in
> separate documentation (mostly since it lacks the ARM mode instructions,
> I suspect). In any case, as far as I can tell, not
2009 Dec 01
0
[LLVMdev] thumb2 has divide instructions
...llo
> OK, here's a patch that follows your suggestion. I'm not an authorized
> developer, so I can't commit it myself. The test case is also attached
> again.
"T2Divide" should be a subtarget feature bit. This way it can be
"automatically" assigned to the procesor.
The instruction selection patterns for t2{S,U}DIV should be also
guarded by this predicate.
Also, for cortex-m3 it will be nice to have separate V7M feature profile.
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2005 Sep 29
2
Hardware Specifications
Does anyone know where i can find out how powerful a machine has to be to
handle a certain amount of call volume?
Eg, 2Ghz is enough processing power to maintain 100 calls at a time.
4Ghz is engouh to process 250 calls etc etc.
Thanks
Dan
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2006 Nov 15
1
Asterisk - big installation
...nd VoIP network. I think about 1000 SIP users accounts and 4 E1 ports. I know that preformance in this case depend on codeck which will be use. I want use card with CAPI interface. Can you describe me your experience with this?
If you have some big installaion, please wriete some info about server (procesor, ram etc), numbers of user and simultaneous calls beetwene VoIP and PSTN. How often server crash?
Regards
Doki
2012 Nov 03
4
[LLVMdev] symbols for exception handling
...unusual requirements for label symbols in .s.
I think that arm thumb has the same issue but have not located yet how
this is handled.
When you have a label of an instruction in mips16, when you reference
the label, the linker
adds a 1 to the address. When you call an odd numbered address, the
procesor switches to mips16 mode and when you call an even numbered
address it switches to mips32 mode.
This causes some problems in the exception tables.
Basically, labels that are not landing pad symbols that are inserted for
exception handling
and dwarf purposes, must declared :
$mysym = .
as oppos...
2012 Nov 03
0
[LLVMdev] symbols for exception handling
...bols in .s.
>
> I think that arm thumb has the same issue but have not located yet how
> this is handled.
>
> When you have a label of an instruction in mips16, when you reference
> the label, the linker
> adds a 1 to the address. When you call an odd numbered address, the
> procesor switches to mips16 mode and when you call an even numbered
> address it switches to mips32 mode.
>
> This causes some problems in the exception tables.
>
> Basically, labels that are not landing pad symbols that are inserted for
> exception handling
> and dwarf purposes, must d...
2012 Nov 03
1
[LLVMdev] symbols for exception handling
...think that arm thumb has the same issue but have not located yet how
>> this is handled.
>>
>> When you have a label of an instruction in mips16, when you reference
>> the label, the linker
>> adds a 1 to the address. When you call an odd numbered address, the
>> procesor switches to mips16 mode and when you call an even numbered
>> address it switches to mips32 mode.
>>
>> This causes some problems in the exception tables.
>>
>> Basically, labels that are not landing pad symbols that are inserted for
>> exception handling
>>...
2009 Jul 02
8
rails hyperthreading on Quad core
Hi, my video sharing website (politube.org) that I developed with rails,
runs on lighttpd/fcgi (I know it is obsolete by now) and is severely
under load and regularly blocks because the lighttpd process chews up
50% of RAM (1GB).
So now I want to move the system to a new server with 8GB, 64bit ,
Quad core processor (intel i7 920) but I am not sure if hyperthreading
will really do anything better.
2009 Dec 02
2
[LLVMdev] thumb2 has divide instructions
Anton Korobeynikov wrote:
> Hello
> "T2Divide" should be a subtarget feature bit. This way it can be
> "automatically" assigned to the procesor.
I agree this is a better approach.
> The instruction selection patterns for t2{S,U}DIV should be also
> guarded by this predicate.
Is this necessary? Since the absence of the predicate causes lowering to
expand divides, the pattern should never show up.
>
> Also, for cortex-m3 i...
2004 Jul 11
0
Neural Net and SNOW
...s,
I was wondering if somebody had already implemented a
parallel version of the function Nnet (with the SNOW
package for instance) and would be willing to share a
few pointers on how to achieve it. I have a training
set of dimensions 905,000 X 5. Should I just get more
RAM and run the nnet on one procesor? Or is there a
slick way to parallelize the computations?
I have tried to load the training set on each node and
have the nnet function run on the master, but it seems
that the master node will still put the whole training
set in memory....
Thank you in advance for your suggestions,
Ron Piccinini...
2003 Sep 23
1
Question about dialogic hardware
...;Dialogic drivers cost of $15 per channel" ?
3. Can I use this hardware with asterisk (for E1-ISDN using Wildcard
E400P <http://www.digium.com/index.php?menu=wildcard_e400p>) ?
4. Anyone with experiance can tell me how they work and can provide a
configuration example? (2 DSP Motorola procesors - I think it means
something!!!)
5. Other posible configuration for 1 E1-ISDN with 24-30 FXS ports?
P.S. Thanks for all answers!
Cristian Vasiliu
mail to:<cvasiliu@accessnet.ro>
www :<cvasiliu.home.ro>
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2004 Aug 24
0
iproute2 in a MIPS processor
Hi, i''m trying to do loadbalancing with a linux embedded with a MIPS procesor,
but I''m in trouble. I have the kernel 2.4.20, and iproute2 ss010824. I compiled
without errors, but when I executed the ip comand to install de mutipath default
route I get the following error (all the previous commands have been executed
according to the LARTC-HOWTO in section 4.2):
lin...
2005 Aug 05
1
Validator
For whatever reason I decided to implement the validator class tonight.
It''s my first go at implementing the class. My first run at it looked
pretty good. I just added a generic .i for it and it all compiled.
Sadly, the samples didn''t work because the base Validator class can''t
actually be used as a validator! You have to derive from
GenericValidator. I
2009 Feb 28
2
No rtp activity
Hi all....
I'm using asterisk for making PSTN calls from extensions registered on
OpenSIPS...In peak hours ,number of calls Increase dramatically to a non
logic number..When checking the calls using asterisk CLI I saw a lot of
calls in ringing status and after 300s(rtphold timeout), asterisk release
all calls...I checked the log file and found..
[Feb 28 11:34:14] NOTICE[19197] chan_sip.c:
2007 Jan 10
1
Fw: Memory problem on a linux cluster using a large data set [Broadcast]
Hi
I listened to all your advise and ran my data on a computer with a 64 bits procesor but i still get the same error saying "it cannot allocate a vector of that size 1240 kb" . I don't want to cut my data in smaller pieces because we are looking at interaction. So are there any other options for me to try out or should i wait for the development of more advanced comput...