search for: processor

...here. Since the only user is stop-machine and the only provider is s390, we can use a default implementation of cpu_relax_yield in sched.h. Suggested-by: Russell King <linux at armlinux.org.uk> Signed-off-by: Christian Borntraeger <borntraeger at de.ibm.com> --- arch/alpha/include/asm/processor.h | 1 - arch/arc/include/asm/processor.h | 3 --- arch/arm/include/asm/processor.h | 2 -- arch/arm64/include/asm/processor.h | 2 -- arch/avr32/include/asm/processor.h | 1 - arch/blackfin/include/asm/processor.h | 1 - arch/c6x/include/asm/processor.h | 1 -...

...here. Since the only user is stop-machine and the only provider is s390, we can use a default implementation of cpu_relax_yield in sched.h. Suggested-by: Russell King <linux at armlinux.org.uk> Signed-off-by: Christian Borntraeger <borntraeger at de.ibm.com> --- arch/alpha/include/asm/processor.h | 1 - arch/arc/include/asm/processor.h | 3 --- arch/arm/include/asm/processor.h | 2 -- arch/arm64/include/asm/processor.h | 2 -- arch/avr32/include/asm/processor.h | 1 - arch/blackfin/include/asm/processor.h | 1 - arch/c6x/include/asm/processor.h | 1 -...

As there are no users left, we can remove cpu_relax_lowlatency. Signed-off-by: Christian Borntraeger <borntraeger at de.ibm.com> --- arch/alpha/include/asm/processor.h | 1 - arch/arc/include/asm/processor.h | 2 -- arch/arm/include/asm/processor.h | 1 - arch/arm64/include/asm/processor.h | 1 - arch/avr32/include/asm/processor.h | 1 - arch/blackfin/include/asm/processor.h | 1 - arch/c6x/include/asm/processor.h | 1 - ar...

...places, lets revert the logic and provide a cpu_relax_yield that can be called in places where yielding is more important than latency. By default this is the same as cpu_relax on all architectures. Signed-off-by: Christian Borntraeger <borntraeger at de.ibm.com> --- arch/alpha/include/asm/processor.h | 1 + arch/arc/include/asm/processor.h | 2 ++ arch/arm/include/asm/processor.h | 1 + arch/arm64/include/asm/processor.h | 1 + arch/avr32/include/asm/processor.h | 1 + arch/blackfin/include/asm/processor.h | 1 + arch/c6x/include/asm/processor.h | 1 + ar...

...e commit 07d9a380680d1c0eb51ef87ff2eab5c994949e69: Linux 4.9-rc2 (2016-10-23 17:10:14 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux.git tags/cpurelax for you to fetch changes up to dcc37f9044436438360402714b7544a8e8779b07: processor.h: remove cpu_relax_lowlatency (2016-10-25 09:49:57 +0200) ---------------------------------------------------------------- cpu_relax: drop lowlatency, introduce yield For spinning loops people do often use barrier() or cpu_relax(). For most architectures cpu_relax and barrier are the same, but o...

...e commit 07d9a380680d1c0eb51ef87ff2eab5c994949e69: Linux 4.9-rc2 (2016-10-23 17:10:14 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux.git tags/cpurelax for you to fetch changes up to dcc37f9044436438360402714b7544a8e8779b07: processor.h: remove cpu_relax_lowlatency (2016-10-25 09:49:57 +0200) ---------------------------------------------------------------- cpu_relax: drop lowlatency, introduce yield For spinning loops people do often use barrier() or cpu_relax(). For most architectures cpu_relax and barrier are the same, but o...

One of the things that I''ve been asked to look at lately is interrupt load spreading, and intrd, to improve the network performance of CMT systems. From my read of the code, it looks like intrd only knows about virtual processors. This has major breakage in that all the virtual processors on a single core in a Niagra system share the common interrupt logic. I.e. when the interrupt handler runs, it interrupts _everything_ on that core. What I''m thinking of is to teach intrd about cores, so that instead of co...

...ble(L,-3); + return 1; +} - /* chassis */ - lua_pushstring(L, "chassis.manufacturer"); - lua_pushstring(L, dmi.chassis.manufacturer); - lua_settable(L,-3); - lua_pushstring(L, "chassis.type"); - lua_pushstring(L, dmi.chassis.type); - lua_settable(L,-3); +static int get_processor_table(lua_State *L, s_dmi *dmi_ptr) +{ + s_processor *processor = &dmi_ptr->processor; + s_signature *signature = &processor->signature; - lua_pushstring(L, "chassis.lock"); - lua_pushstring(L, dmi.chassis.lock); + if (!processor->filled) + return 0; + /* proces...

I''ve got a new system with Dual Quad Core Intel E5520 processors and Intel 82576 NICs built on the motherboard (this is a Supermicro Nehalem based blade). I''m running Xen 3.4.2, but I''ve also tried 3.4.1 and had the same problem. Dom0''s network works flawlessly, but the DomU systems all have network issues. Whenever they transmit l...

Dear Tomas, thank you very much. I installed r-devel r75201 and tested. The machine with 88 cores has NUMA disabled. It therefore has 2 processor groups with 64 and 24 processors each. require(parallel) detectCores() # [1] 88 This is great! Then I went on to test with a simple 'foreach()' loop. I started with 64 processors (max limit of 1 processor group). I ran with a simple function of 0.5s sleep. require(snow) require(doSNOW)...

You might find this useful ... TSC and Power Management Events on AMD Processors - Nov 2, 2005 - Rich Brunner, AMD Fellow Current AMD Opteron(tm) and Athlon(tm)64 processors provide power management mechanisms that independently adjust the performance state ("P-state") and power state ("C-state") of the processor[1][2]; these state changes can...

Dear Tomas, thank you for looking into this. Here's the output: # number of logical processors - what detectCores() should return out <- system("wmic cpu get numberoflogicalprocessors", intern=TRUE) [1] "NumberOfLogicalProcessors \r" "22 \r" "22 \r" [4] "20 \r" &quo...

Dear R-devel list, R's detectCores() function internally calls "ncpus" function to get the total number of logical processors. However, this doesnot seem to take NUMA into account on Windows machines. On a machine having 48 processors (24 cores) in total and windows server 2012 installed, if NUMA is enabled and has 2 nodes (node 0 and node 1 each having 24 CPUs), then R's detectCores() only detects 24 instead of the...

The Processors agent reports details regarding the processing power for the managed node. Defined the agent within schema.xml. Wrote the wrapper code to create and populate an instance of the agent. The properties for the Processors agent have also been trimmed back to what is readily available via HAL. Signe...

..., DX 0000, SI 1c94, DI 0c3e, DS 11d7, ES 11d7 fixme:int31:DOSVM_Int31Handler get dpmi capabilities - unimplemented err:int31:DOSVM_Int31Handler int31: unknown/not implemented parameters: int31: AX 0a00, BX 1000, CX 1000, DX 0000, SI 1c9e, DI 0ba2, DS 11d7, ES 11d7 fixme:int31:DOSVM_Int31Handler Get Processor Exception Handler Vector (0x08) fixme:int31:DOSVM_Int31Handler Set Processor Exception Handler Vector (0x08) fixme:int31:DOSVM_Int31Handler Get Processor Exception Handler Vector (0x09) fixme:int31:DOSVM_Int31Handler Set Processor Exception Handler Vector (0x09) fixme:int31:DOSVM_Int31Handler Get P...

A summary for reference: the new detectCores() for Windows in R-devel seems to be working both for logical and physical cores on systems with >64 logical processors? (thanks to Arun for testing!). If the feature is important for anyone particularly using an older version of Windows and/or on a system with >64 logical processors, it would be nice if you could test and report any possible problem. As I mentioned earlier, in older versions of R one can as...

This patch includes one small change: the Processors::get_load_average() method is now const since it does not change the object's state.

After some feedback from Slow, mainly about the load_average API being a method rather than an ongoing statistic. So I've converted the code over to instead update the load average statistic on a regular basis.

...rved) (XEN) 00000000fee00000 - 00000000fef00000 (reserved) (XEN) 0000000100000000 - 0000000430000000 (usable) (XEN) System RAM: 16383MB (16776756kB) (XEN) Xen heap: 14MB (14568kB) (XEN) Reserving non-aligned node boundary @ mfn 2293760 (XEN) Domain heap initialised: DMA width 32 bits (XEN) Processor #0 0:2 APIC version 16 (XEN) Processor #1 0:2 APIC version 16 (XEN) Processor #2 0:2 APIC version 16 (XEN) Processor #3 0:2 APIC version 16 (XEN) Processor #4 0:2 APIC version 16 (XEN) Processor #5 0:2 APIC version 16 (XEN) Processor #6 0:2 APIC version 16 (XEN) Processor #7 0:2 APIC version...

...(XEN) Using APIC driver default (XEN) ACPI: PM-Timer IO Port: 0x808 (XEN) ACPI: ACPI SLEEP INFO: pm1x_cnt[804,0], pm1x_evt[800,0] (XEN) ACPI: wakeup_vec[bf79e00c], vec_size[20] (XEN) ACPI: Local APIC address 0xfee00000 (XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) (XEN) Processor #0 7:10 APIC version 21 (XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x10] enabled) (XEN) Processor #16 7:10 APIC version 21 (XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled) (XEN) Processor #2 7:10 APIC version 21 (XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x12] enabled) (XEN) Processor #18 7:1...